From patchwork Wed Mar 14 18:10:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Siqueira X-Patchwork-Id: 10283175 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0D1F9602C2 for ; Wed, 14 Mar 2018 18:10:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F1786285EF for ; Wed, 14 Mar 2018 18:10:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E60C6285CE; Wed, 14 Mar 2018 18:10:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6BE4B285FC for ; Wed, 14 Mar 2018 18:10:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752484AbeCNSKo (ORCPT ); Wed, 14 Mar 2018 14:10:44 -0400 Received: from mail-qt0-f194.google.com ([209.85.216.194]:37744 "EHLO mail-qt0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752205AbeCNSKn (ORCPT ); Wed, 14 Mar 2018 14:10:43 -0400 Received: by mail-qt0-f194.google.com with SMTP id a23so4452694qtm.4; Wed, 14 Mar 2018 11:10:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=kdoMos7qmdU0fCYeBPZTfA0Muk3bcH8XA1+LhKdjYu8=; b=oGg5YRH7sP2eIS3Yzfwnppoc8SeSdWjCspfhp0RxD72WWjnHE2UIBvcBkfcETN9nE8 LbVw8IgEV3W6l8Va6unsTP5sQ2Ikef9aJGtMz1mQg/xxG5zHRO3DwTbfEMYV15jlr8R5 6RcrV1NdXR3ySUER8yS6D0cbpSCHbvRwBCLdjBXzgU0hqCIxNWidSKK4K33wUpIHKep+ IY5EYMh4t/89gBhh3ygJf+sYrVZI5DoyCHl8zKyj8SpA/x5NSmFwAux7/YevFUpBbIs7 fpr83B9rlZ4vkCw1psGKhapLa1yq/iB5kFM/ypB2MyRJOsVwmso1oTRS2vWbcNtPvpWV xRNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=kdoMos7qmdU0fCYeBPZTfA0Muk3bcH8XA1+LhKdjYu8=; b=XXZm8B8T0gIWB92aXSFLLWN8kZd/VZWYxsfhaYLepOmNoj17sGPEuyvq4TrzbkoRFc HJONnthZTeo8HbIgB6EYV94PHbJ0cXp1SZsE56AaUDT2fMSEoYwXrk2VU2GgWmj5D2Z/ b255QwZIrkeBTX/uEcxWxmmAl4UNrC7QMDtt/lBC+dtc6jDmUkTqSc7oTFRCEXxjilAP fTD/L7kVWjFpUfR3vl35/M6/DiMFlTlpUZRzKdAGlqICtqWs5Ya80RYy+fYIrlmY/oXL AIYInBBPOMACc1A0QiMv0+M+vgqCTiwJBD3VxUb3Rh5MMkVpr1MCD3hS6WvLy/r210tx Oz2A== X-Gm-Message-State: AElRT7H3QB0VAtUFKZJ/8Vr5MCJfvfE35/sUdomPnq3XqNQhjLfQqfMD sINwgHQDNsci9hIpa8oR8jQ= X-Google-Smtp-Source: AG47ELvmgICSmT1KuBOWZmy/GxO7lYaOLDM1mVFIpmUZSUMMReTWBocf8/wK+PdXyMEbHWC50XZenQ== X-Received: by 10.200.55.66 with SMTP id p2mr5659153qtb.282.1521051042206; Wed, 14 Mar 2018 11:10:42 -0700 (PDT) Received: from smtp.gmail.com ([143.107.45.1]) by smtp.gmail.com with ESMTPSA id c5sm1889786qkf.93.2018.03.14.11.10.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 14 Mar 2018 11:10:41 -0700 (PDT) Date: Wed, 14 Mar 2018 15:10:37 -0300 From: Rodrigo Siqueira To: Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , Greg Kroah-Hartman , Barry Song <21cnbao@gmail.com>, John Syne Cc: daniel.baluta@nxp.com, linux-iio@vger.kernel.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/7] staging:iio:ade7854: Rework SPI write function Message-ID: <0dd616ddca93968c254006b379b2817db819bb39.1521037060.git.rodrigosiqueiramelo@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20180223 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The write operation using SPI has a many code duplications (similar to I2C) and four different interfaces per data size. This patch introduces a single function that centralizes the main task related to SPI. Signed-off-by: Rodrigo Siqueira --- drivers/staging/iio/meter/ade7854-spi.c | 100 ++++++++++++++------------------ 1 file changed, 45 insertions(+), 55 deletions(-) diff --git a/drivers/staging/iio/meter/ade7854-spi.c b/drivers/staging/iio/meter/ade7854-spi.c index 4419b8f06197..0dae118428cf 100644 --- a/drivers/staging/iio/meter/ade7854-spi.c +++ b/drivers/staging/iio/meter/ade7854-spi.c @@ -15,9 +15,10 @@ #include #include "ade7854.h" -static int ade7854_spi_write_reg_8(struct device *dev, - u16 reg_address, - u8 val) +static int ade7854_spi_write_reg(struct device *dev, + u16 reg_address, + u32 val, + enum data_size type) { int ret; struct iio_dev *indio_dev = dev_to_iio_dev(dev); @@ -32,36 +33,58 @@ static int ade7854_spi_write_reg_8(struct device *dev, st->tx[0] = ADE7854_WRITE_REG; st->tx[1] = (reg_address >> 8) & 0xFF; st->tx[2] = reg_address & 0xFF; - st->tx[3] = val & 0xFF; + switch (type) { + case DATA_SIZE_8_BITS: + st->tx[3] = val & 0xFF; + break; + case DATA_SIZE_16_BITS: + xfer.len = 5; + st->tx[3] = (val >> 8) & 0xFF; + st->tx[4] = val & 0xFF; + break; + case DATA_SIZE_24_BITS: + xfer.len = 6; + st->tx[3] = (val >> 16) & 0xFF; + st->tx[4] = (val >> 8) & 0xFF; + st->tx[5] = val & 0xFF; + break; + case DATA_SIZE_32_BITS: + xfer.len = 7; + st->tx[3] = (val >> 24) & 0xFF; + st->tx[4] = (val >> 16) & 0xFF; + st->tx[5] = (val >> 8) & 0xFF; + st->tx[6] = val & 0xFF; + break; + default: + ret = -EINVAL; + goto error_spi_mutex_unlock; + } ret = spi_sync_transfer(st->spi, &xfer, 1); +error_spi_mutex_unlock: mutex_unlock(&st->buf_lock); return ret; } +static int ade7854_spi_write_reg_8(struct device *dev, + u16 reg_address, + u8 val) +{ + int ret; + + ret = ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_8_BITS); + + return ret; +} + static int ade7854_spi_write_reg_16(struct device *dev, u16 reg_address, u16 val) { int ret; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); - struct spi_transfer xfer = { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 5, - }; - mutex_lock(&st->buf_lock); - st->tx[0] = ADE7854_WRITE_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; - st->tx[3] = (val >> 8) & 0xFF; - st->tx[4] = val & 0xFF; - - ret = spi_sync_transfer(st->spi, &xfer, 1); - mutex_unlock(&st->buf_lock); + ret = ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_16_BITS); return ret; } @@ -71,24 +94,8 @@ static int ade7854_spi_write_reg_24(struct device *dev, u32 val) { int ret; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); - struct spi_transfer xfer = { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 6, - }; - mutex_lock(&st->buf_lock); - st->tx[0] = ADE7854_WRITE_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; - st->tx[3] = (val >> 16) & 0xFF; - st->tx[4] = (val >> 8) & 0xFF; - st->tx[5] = val & 0xFF; - - ret = spi_sync_transfer(st->spi, &xfer, 1); - mutex_unlock(&st->buf_lock); + ret = ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_24_BITS); return ret; } @@ -98,25 +105,8 @@ static int ade7854_spi_write_reg_32(struct device *dev, u32 val) { int ret; - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); - struct spi_transfer xfer = { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 7, - }; - mutex_lock(&st->buf_lock); - st->tx[0] = ADE7854_WRITE_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; - st->tx[3] = (val >> 24) & 0xFF; - st->tx[4] = (val >> 16) & 0xFF; - st->tx[5] = (val >> 8) & 0xFF; - st->tx[6] = val & 0xFF; - - ret = spi_sync_transfer(st->spi, &xfer, 1); - mutex_unlock(&st->buf_lock); + ret = ade7854_spi_write_reg(dev, reg_address, val, DATA_SIZE_32_BITS); return ret; }