| Message ID | 1524065874-434-4-git-send-email-fabrice.gasnier@st.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, 18 Apr 2018 17:37:54 +0200 Fabrice Gasnier <fabrice.gasnier@st.com> wrote: > stm32mp157c has an ADC block with two physical ADCs. > > Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> The relevant driver support is queued up for next merge window in the IIO tree. Thanks, Jonathan > --- > arch/arm/boot/dts/stm32mp157c.dtsi | 32 ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi > index bc3eddc..7758a90 100644 > --- a/arch/arm/boot/dts/stm32mp157c.dtsi > +++ b/arch/arm/boot/dts/stm32mp157c.dtsi > @@ -160,6 +160,38 @@ > status = "disabled"; > }; > > + adc: adc@48003000 { > + compatible = "st,stm32mp1-adc-core"; > + reg = <0x48003000 0x400>; > + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&rcc ADC12>, <&rcc ADC12_K>; > + clock-names = "bus", "adc"; > + interrupt-controller; > + #interrupt-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "disabled"; > + > + adc1: adc@0 { > + compatible = "st,stm32mp1-adc"; > + #io-channel-cells = <1>; > + reg = <0x0>; > + interrupt-parent = <&adc>; > + interrupts = <0>; > + status = "disabled"; > + }; > + > + adc2: adc@100 { > + compatible = "st,stm32mp1-adc"; > + #io-channel-cells = <1>; > + reg = <0x100>; > + interrupt-parent = <&adc>; > + interrupts = <1>; > + status = "disabled"; > + }; > + }; > + > rcc: rcc@50000000 { > compatible = "st,stm32mp1-rcc", "syscon"; > reg = <0x50000000 0x1000>; -- To unsubscribe from this list: send the line "unsubscribe linux-iio" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi b/arch/arm/boot/dts/stm32mp157c.dtsi index bc3eddc..7758a90 100644 --- a/arch/arm/boot/dts/stm32mp157c.dtsi +++ b/arch/arm/boot/dts/stm32mp157c.dtsi @@ -160,6 +160,38 @@ status = "disabled"; }; + adc: adc@48003000 { + compatible = "st,stm32mp1-adc-core"; + reg = <0x48003000 0x400>; + interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc ADC12>, <&rcc ADC12_K>; + clock-names = "bus", "adc"; + interrupt-controller; + #interrupt-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + adc1: adc@0 { + compatible = "st,stm32mp1-adc"; + #io-channel-cells = <1>; + reg = <0x0>; + interrupt-parent = <&adc>; + interrupts = <0>; + status = "disabled"; + }; + + adc2: adc@100 { + compatible = "st,stm32mp1-adc"; + #io-channel-cells = <1>; + reg = <0x100>; + interrupt-parent = <&adc>; + interrupts = <1>; + status = "disabled"; + }; + }; + rcc: rcc@50000000 { compatible = "st,stm32mp1-rcc", "syscon"; reg = <0x50000000 0x1000>;
stm32mp157c has an ADC block with two physical ADCs. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> --- arch/arm/boot/dts/stm32mp157c.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)