From patchwork Thu Jun 21 15:39:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akinobu Mita X-Patchwork-Id: 10480085 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 31A2F60365 for ; Thu, 21 Jun 2018 15:39:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 20D7E2918E for ; Thu, 21 Jun 2018 15:39:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1575B291AC; Thu, 21 Jun 2018 15:39:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A841A2918E for ; Thu, 21 Jun 2018 15:39:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933256AbeFUPj2 (ORCPT ); Thu, 21 Jun 2018 11:39:28 -0400 Received: from mail-pl0-f66.google.com ([209.85.160.66]:38695 "EHLO mail-pl0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933188AbeFUPj1 (ORCPT ); Thu, 21 Jun 2018 11:39:27 -0400 Received: by mail-pl0-f66.google.com with SMTP id d10-v6so1899067plo.5 for ; Thu, 21 Jun 2018 08:39:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1EaTgHbKrtx0fJ7X/i91vjnXDOFRCgABiE7v49rG2Zs=; b=V1fbW1x/HwsP1oLIuS46kB5GkvRUdsZkX88ygef3RuU2A1ofHfHSDKR06lujCRANEO WgR5I8whdO4vJnNnvFp4EREqC6uY4lHsm+z/n8LbBg77XvVtVSMMJdlSNYvs2o30VcrE kh2B4z2TIC+USGWohwAi9nRFTHJvsSSZr71of7u/x7iEkVhNfTzKAs+IPaIauus65/Qm J5N7y7oWaxZSXPlny91vwZbsHzXrXZhD0G2Urtoytq6K71jo39enN5mhweFYDqRlv/ao sDg7DEvh0v3a8QUwPcGVYnprFXfcchDWZnM85GHiAy/ljgQvYtbG4Iy/RC7Slsvi/eFz MlJQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1EaTgHbKrtx0fJ7X/i91vjnXDOFRCgABiE7v49rG2Zs=; b=nJmIqZ+fef67D+riXJXNHoWmW/Iu2j6lHfTheKtZ77BbyagRfh3mkEJZq6Yg3GARdf xNp5aR96Tv/mDu5S9SAHpl0tROtL+bj50BouNL2uR1IR++ljM0wYLOwfgEo7V3IxSi5M /5PM4/HRLXOoefnblYW5eh6Ud0ES2uw0WGD0n/knu1OD46mUc+3CIfYg9IG7A3pJ2nIY xrIsTI6NNWT3uziJUg3s7dL3vyAme8eGlWBJsLvub9U78PwH9gYHnPrb/50Y59yW/jiE PSWGJK94Eb2z9Q5R9B3hkGRA/mwKzkWDn5i48mcofR61cSAYdLpOOzkZDsE09lRqxWdB X93g== X-Gm-Message-State: APt69E3s78mP9v06trT6eJsPZTpYI+nrJn4QOJDwev5qzzSTx/j3qJpZ GWGvPODhW5gfjJxSJ9EDkCqzPA== X-Google-Smtp-Source: ADUXVKLGkVANQErUg0CfHLF31GsU4+PcWYp1oW6GAAcb7GEmzmvpbI7KAvH8jRz65lZ72NrsXcvYPA== X-Received: by 2002:a17:902:1121:: with SMTP id d30-v6mr29654472pla.247.1529595567000; Thu, 21 Jun 2018 08:39:27 -0700 (PDT) Received: from localhost.localdomain ([240f:34:212d:1:a469:fcdd:65db:d22]) by smtp.gmail.com with ESMTPSA id e16-v6sm7482362pff.185.2018.06.21.08.39.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 21 Jun 2018 08:39:26 -0700 (PDT) From: Akinobu Mita To: linux-iio@vger.kernel.org Cc: Akinobu Mita , Eva Rachel Retuya , Andy Shevchenko , Jonathan Cameron Subject: [PATCH v3 3/4] iio: accel: adxl345: add calibration offset support Date: Fri, 22 Jun 2018 00:39:07 +0900 Message-Id: <1529595548-25215-4-git-send-email-akinobu.mita@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529595548-25215-1-git-send-email-akinobu.mita@gmail.com> References: <1529595548-25215-1-git-send-email-akinobu.mita@gmail.com> Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ADXL345 provides the offset adjustment registers for each axis. This adds the iio channel information for the calibraion offsets with that feature. Cc: Eva Rachel Retuya Cc: Andy Shevchenko Cc: Jonathan Cameron Signed-off-by: Akinobu Mita --- * v3 - Define ADXL345_REG_OSF_AXIS(si) for cleaner register access drivers/iio/accel/adxl345_core.c | 42 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 41 insertions(+), 1 deletion(-) diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c index ef641db..d109ca5 100644 --- a/drivers/iio/accel/adxl345_core.c +++ b/drivers/iio/accel/adxl345_core.c @@ -18,6 +18,10 @@ #include "adxl345.h" #define ADXL345_REG_DEVID 0x00 +#define ADXL345_REG_OFSX 0x1e +#define ADXL345_REG_OFSY 0x1f +#define ADXL345_REG_OFSZ 0x20 +#define ADXL345_REG_OFS_AXIS(si) (ADXL345_REG_OFSX + (si)) #define ADXL345_REG_POWER_CTL 0x2D #define ADXL345_REG_DATA_FORMAT 0x31 #define ADXL345_REG_DATAX0 0x32 @@ -55,7 +59,8 @@ struct adxl345_data { .type = IIO_ACCEL, \ .modified = 1, \ .channel2 = IIO_MOD_##axis, \ - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ + BIT(IIO_CHAN_INFO_CALIBBIAS), \ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ .scan_index = si, \ } @@ -72,6 +77,7 @@ static int adxl345_read_raw(struct iio_dev *indio_dev, { struct adxl345_data *data = iio_priv(indio_dev); __le16 accel; + unsigned int regval; int ret; switch (mask) { @@ -94,6 +100,39 @@ static int adxl345_read_raw(struct iio_dev *indio_dev, *val2 = adxl345_uscale; return IIO_VAL_INT_PLUS_MICRO; + case IIO_CHAN_INFO_CALIBBIAS: + ret = regmap_read(data->regmap, + ADXL345_REG_OFS_AXIS(chan->scan_index), + ®val); + if (ret < 0) + return ret; + /* + * 8-bit resolution at +/- 2g, that is 4x accel data scale + * factor + */ + *val = sign_extend32(regval, 7) * 4; + + return IIO_VAL_INT; + } + + return -EINVAL; +} + +static int adxl345_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct adxl345_data *data = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_CALIBBIAS: + /* + * 8-bit resolution at +/- 2g, that is 4x accel data scale + * factor + */ + return regmap_write(data->regmap, + ADXL345_REG_OFSX + chan->scan_index, + val / 4); } return -EINVAL; @@ -101,6 +140,7 @@ static int adxl345_read_raw(struct iio_dev *indio_dev, static const struct iio_info adxl345_info = { .read_raw = adxl345_read_raw, + .write_raw = adxl345_write_raw, }; int adxl345_core_probe(struct device *dev, struct regmap *regmap,