From patchwork Mon Jun 25 15:22:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akinobu Mita X-Patchwork-Id: 10486725 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9378260230 for ; Mon, 25 Jun 2018 15:23:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 895DF28511 for ; Mon, 25 Jun 2018 15:23:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7E15F2851B; Mon, 25 Jun 2018 15:23:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1F39628511 for ; Mon, 25 Jun 2018 15:23:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751828AbeFYPXK (ORCPT ); Mon, 25 Jun 2018 11:23:10 -0400 Received: from mail-pf0-f193.google.com ([209.85.192.193]:39961 "EHLO mail-pf0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751018AbeFYPXJ (ORCPT ); Mon, 25 Jun 2018 11:23:09 -0400 Received: by mail-pf0-f193.google.com with SMTP id z24-v6so6604413pfe.7 for ; Mon, 25 Jun 2018 08:23:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=VYlA8HtrpEtc+o8W6wbIdx3dCa4hFWyzD4ACY8vDhds=; b=JYjQqJd2nXZXtNbz3OKkzIrWvP8T/jy1OtizrZCl7YdH1vyfo+IcEbpcg2BNwZZOfN fmeAJJT7I5RCAQ5i/OP96e46VOhGGE9bn3rSBetRYViWWC2hx730K3qQ1OABduCOxcKB e2qD4BlTWzP7t0gTr7jPZ1FydW6Dl+kAxkUxCkbyaC3NmGu7EX+ALTo7Wu+Bv0nZOrxf DXwemU0QUkFDQ9nHK2j36tP1rATW4bWyqkWPfvBcI8Eji/N925e4PFOBA1sy+cOBIDjp FKPKdP0hx0XdygCO42WRahIuOd5sKk0Dg9j2MxrlVP/9/T5zA0tEztV30amvh5VAKbAz yfnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=VYlA8HtrpEtc+o8W6wbIdx3dCa4hFWyzD4ACY8vDhds=; b=rzuyz1oG2fadDqiDljzc4THqOpC/EVIaOnQR4kD4xeygKj5i3lAHAQMLRjtASFp87w +S1wGFJk4z8hqqOnmFRutP4/lFpIBRbQ6KW3JELmQCObV1N8KtE2+PzXPMaX0N4M5ca7 L9Waf92QAFGDw3ngW6Y4bp0+jHtQJkCrn8YVTP5vBgZbEAoJMv/rDU+TStSG/DTtiWSW UYZt40nimEIS/ZfsiAfiezhgu5cwmniF5la8HxHwW1sfPnVcGcyBYadgxaTIG1DSfsc0 Fs44MDaHjn2cXt6ZTuijXJlCNKgR8CEtTt5e7Qdv5AA0b4ozYkR6pXwRDK1tnXSoBYdk 4rAQ== X-Gm-Message-State: APt69E2vgRZtcTeXWzvOfYiEvM9LkPdM9l53KN3UHcxQyQzHOhp/Fphw scn5z03BiSYAOIeb+2GN//wErg== X-Google-Smtp-Source: ADUXVKI7yUYaH6maowyz8N43oZ4phg7XZd2JAiTmLa801bZXlmtjzyt9ER347+QUtsuoOMIOhWnDGw== X-Received: by 2002:aa7:8345:: with SMTP id z5-v6mr13753721pfm.251.1529940189061; Mon, 25 Jun 2018 08:23:09 -0700 (PDT) Received: from localhost.localdomain ([240f:34:212d:1:488e:1524:9076:6446]) by smtp.gmail.com with ESMTPSA id g2-v6sm12610781pgn.92.2018.06.25.08.23.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 25 Jun 2018 08:23:08 -0700 (PDT) From: Akinobu Mita To: linux-iio@vger.kernel.org Cc: Akinobu Mita , Eva Rachel Retuya , Andy Shevchenko , Jonathan Cameron Subject: [PATCH v4 2/4] iio: accel: adxl345: convert address field usage in iio_chan_spec Date: Tue, 26 Jun 2018 00:22:41 +0900 Message-Id: <1529940163-5149-3-git-send-email-akinobu.mita@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1529940163-5149-1-git-send-email-akinobu.mita@gmail.com> References: <1529940163-5149-1-git-send-email-akinobu.mita@gmail.com> Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently the address field in iio_chan_spec is filled with an accel data register address for the corresponding axis. In preparation for adding calibration offset support, this sets the address field to the index of accel data registers instead of the actual register address. This change makes it easier to access both accel registers and calibration offset registers with fewer lines of code as these are located in X-axis, Y-axis, Z-axis order. Cc: Eva Rachel Retuya Cc: Andy Shevchenko Cc: Jonathan Cameron Signed-off-by: Akinobu Mita --- * v4 - Stop abusing scan_index and keep using address field in iio_chan_spec drivers/iio/accel/adxl345_core.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c index 8e0d56b..7a25840 100644 --- a/drivers/iio/accel/adxl345_core.c +++ b/drivers/iio/accel/adxl345_core.c @@ -23,6 +23,8 @@ #define ADXL345_REG_DATAX0 0x32 #define ADXL345_REG_DATAY0 0x34 #define ADXL345_REG_DATAZ0 0x36 +#define ADXL345_REG_DATA_AXIS(index) \ + (ADXL345_REG_DATAX0 + (index) * sizeof(__le16)) #define ADXL345_POWER_CTL_MEASURE BIT(3) #define ADXL345_POWER_CTL_STANDBY 0x00 @@ -49,19 +51,19 @@ struct adxl345_data { u8 data_range; }; -#define ADXL345_CHANNEL(reg, axis) { \ +#define ADXL345_CHANNEL(index, axis) { \ .type = IIO_ACCEL, \ .modified = 1, \ .channel2 = IIO_MOD_##axis, \ - .address = reg, \ + .address = index, \ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ } static const struct iio_chan_spec adxl345_channels[] = { - ADXL345_CHANNEL(ADXL345_REG_DATAX0, X), - ADXL345_CHANNEL(ADXL345_REG_DATAY0, Y), - ADXL345_CHANNEL(ADXL345_REG_DATAZ0, Z), + ADXL345_CHANNEL(0, X), + ADXL345_CHANNEL(1, Y), + ADXL345_CHANNEL(2, Z), }; static int adxl345_read_raw(struct iio_dev *indio_dev, @@ -69,7 +71,7 @@ static int adxl345_read_raw(struct iio_dev *indio_dev, int *val, int *val2, long mask) { struct adxl345_data *data = iio_priv(indio_dev); - __le16 regval; + __le16 accel; int ret; switch (mask) { @@ -79,12 +81,13 @@ static int adxl345_read_raw(struct iio_dev *indio_dev, * ADXL345_REG_DATA(X0/Y0/Z0) contain the least significant byte * and ADXL345_REG_DATA(X0/Y0/Z0) + 1 the most significant byte */ - ret = regmap_bulk_read(data->regmap, chan->address, ®val, - sizeof(regval)); + ret = regmap_bulk_read(data->regmap, + ADXL345_REG_DATA_AXIS(chan->address), + &accel, sizeof(accel)); if (ret < 0) return ret; - *val = sign_extend32(le16_to_cpu(regval), 12); + *val = sign_extend32(le16_to_cpu(accel), 12); return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: *val = 0;