From patchwork Sat Jun 30 16:32:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akinobu Mita X-Patchwork-Id: 10498319 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B452260325 for ; Sat, 30 Jun 2018 16:33:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9764C28CC0 for ; Sat, 30 Jun 2018 16:33:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8BE6D28CC9; Sat, 30 Jun 2018 16:33:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1C85828CC0 for ; Sat, 30 Jun 2018 16:33:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751298AbeF3QdJ (ORCPT ); Sat, 30 Jun 2018 12:33:09 -0400 Received: from mail-pg0-f65.google.com ([74.125.83.65]:41829 "EHLO mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751246AbeF3QdJ (ORCPT ); Sat, 30 Jun 2018 12:33:09 -0400 Received: by mail-pg0-f65.google.com with SMTP id l65-v6so5289562pgl.8 for ; Sat, 30 Jun 2018 09:33:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=77Jyj4EhTB1olS1XlYO+CgpCQBdd7O10QtpDCLGw+tw=; b=OvDtbEIdOMPVVQNfmBQ4YB/e+E4Iq0wQl6eaPpviViVD8UQ9vBr4QRlqxSuNslvBgY XEGPtyzIfQ2K0eFxX1yzMoei1S9AD6MnWb+GTt2ainMpp7JPKlvhSsYgc1VR5QUxYm6Y c+U15IklhHVpmVItb4+hFri7UrLFVkiNqseAOAVMomEkeEoMMDu0pnnAbhBjmZgSEzUG oU7seTXNH0jVSt+x53vGXPMzUaXrbMTzmtNUHGz0FWoUH0Rb+jlnZ55g1g2wZpyEnsNW 3tDT7FsDw6t7Gg/EJt6jw47SZyv6dWYBd7MijRJWmWDFolg2D8z4u2zRqiOZCa9DXJjb OkgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=77Jyj4EhTB1olS1XlYO+CgpCQBdd7O10QtpDCLGw+tw=; b=F+Y0x5g97q9zXmkrrwPcAKrygU+5dYWZZdAomarhnPZKsTWC4sv2yGCMXIlBGEp+gg LzLyVLSRRU2ruNH6QzgYen7vP5mj6J0oF444Emycb2z3HZ5U1Qasyd3euKB4FVifX4Ij z9lTD/KCZbelW9tkGsYa45YzQrdHEwgXwGtAt5qrFDvTBBG+nrUR8fy9bT+qIPFYschU Dg/5uwsz+oOTEyAqZKcWeIEQw9jdsEFQAiNXpMvozCvoBQ8WYdGr54EurVAWjHeTFLgq tipUa3eWaEQJUQxm+GOLHM0motNkGau1NWdXxtueVVRNI7Um2rrl9fdq7NGpiyOxVSYO Peeg== X-Gm-Message-State: APt69E3igfhVaT/M4tfET3Vthg2nJ16gsapU2r7GFzsluc3swavL1Jsj A/Lh0L6Kx7URmojqkWMvS5K1bw== X-Google-Smtp-Source: AAOMgpfxJ5sXUL9Ki27hppjte4vTlXAloMbOdj8xUKklVzGSAFO4GlWOeVmdc2olyMig+EDifPrHQw== X-Received: by 2002:a62:640b:: with SMTP id y11-v6mr18983136pfb.204.1530376388553; Sat, 30 Jun 2018 09:33:08 -0700 (PDT) Received: from localhost.localdomain ([240f:34:212d:1:8dd7:7458:d0a4:c135]) by smtp.gmail.com with ESMTPSA id 74-v6sm26992545pfj.127.2018.06.30.09.33.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 30 Jun 2018 09:33:07 -0700 (PDT) From: Akinobu Mita To: linux-iio@vger.kernel.org Cc: Akinobu Mita , Eva Rachel Retuya , Andy Shevchenko , Jonathan Cameron Subject: [PATCH v5 4/4] iio: accel: adxl345: add sampling frequency support Date: Sun, 1 Jul 2018 01:32:45 +0900 Message-Id: <1530376365-23946-5-git-send-email-akinobu.mita@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1530376365-23946-1-git-send-email-akinobu.mita@gmail.com> References: <1530376365-23946-1-git-send-email-akinobu.mita@gmail.com> Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ADXL345 provides selectable output data rate. This adds the iio channel information for the sampling frequency with that feature. Cc: Eva Rachel Retuya Cc: Andy Shevchenko Cc: Jonathan Cameron Signed-off-by: Akinobu Mita --- * v5 (Suggested by Andy Shevchenko) - Introduce constant for nHZ per HZ - Find an register setting without looping over all available frequencies - Allow all user supplied values and round to an available frequency drivers/iio/accel/adxl345_core.c | 57 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 56 insertions(+), 1 deletion(-) diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c index 7b29ae8..fba1ae2 100644 --- a/drivers/iio/accel/adxl345_core.c +++ b/drivers/iio/accel/adxl345_core.c @@ -14,6 +14,7 @@ #include #include +#include #include "adxl345.h" @@ -22,6 +23,7 @@ #define ADXL345_REG_OFSY 0x1f #define ADXL345_REG_OFSZ 0x20 #define ADXL345_REG_OFS_AXIS(index) (ADXL345_REG_OFSX + (index)) +#define ADXL345_REG_BW_RATE 0x2C #define ADXL345_REG_POWER_CTL 0x2D #define ADXL345_REG_DATA_FORMAT 0x31 #define ADXL345_REG_DATAX0 0x32 @@ -30,6 +32,10 @@ #define ADXL345_REG_DATA_AXIS(index) \ (ADXL345_REG_DATAX0 + (index) * sizeof(__le16)) +#define ADXL345_BW_RATE GENMASK(3, 0) +#define ADXL345_BASE_RATE_NANO_HZ 97656250LL +#define NHZ_PER_HZ 1000000000LL + #define ADXL345_POWER_CTL_MEASURE BIT(3) #define ADXL345_POWER_CTL_STANDBY 0x00 @@ -62,7 +68,8 @@ struct adxl345_data { .address = index, \ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ BIT(IIO_CHAN_INFO_CALIBBIAS), \ - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ } static const struct iio_chan_spec adxl345_channels[] = { @@ -77,6 +84,7 @@ static int adxl345_read_raw(struct iio_dev *indio_dev, { struct adxl345_data *data = iio_priv(indio_dev); __le16 accel; + long long samp_freq_nhz; unsigned int regval; int ret; @@ -112,6 +120,16 @@ static int adxl345_read_raw(struct iio_dev *indio_dev, *val = sign_extend32(regval, 7) * 4; return IIO_VAL_INT; + case IIO_CHAN_INFO_SAMP_FREQ: + ret = regmap_read(data->regmap, ADXL345_REG_BW_RATE, ®val); + if (ret < 0) + return ret; + + samp_freq_nhz = ADXL345_BASE_RATE_NANO_HZ << + (regval & ADXL345_BW_RATE); + *val = div_s64_rem(samp_freq_nhz, NHZ_PER_HZ, val2); + + return IIO_VAL_INT_PLUS_NANO; } return -EINVAL; @@ -122,6 +140,7 @@ static int adxl345_write_raw(struct iio_dev *indio_dev, int val, int val2, long mask) { struct adxl345_data *data = iio_priv(indio_dev); + s64 n; switch (mask) { case IIO_CHAN_INFO_CALIBBIAS: @@ -132,14 +151,50 @@ static int adxl345_write_raw(struct iio_dev *indio_dev, return regmap_write(data->regmap, ADXL345_REG_OFS_AXIS(chan->address), val / 4); + case IIO_CHAN_INFO_SAMP_FREQ: + n = div_s64(val * NHZ_PER_HZ + val2, ADXL345_BASE_RATE_NANO_HZ); + n = ilog2(max_t(s64, n, 1)); + + return regmap_update_bits(data->regmap, ADXL345_REG_BW_RATE, + ADXL345_BW_RATE, + min_t(int, n, ADXL345_BW_RATE)); } return -EINVAL; } +static int adxl345_write_raw_get_fmt(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + long mask) +{ + switch (mask) { + case IIO_CHAN_INFO_CALIBBIAS: + return IIO_VAL_INT; + case IIO_CHAN_INFO_SAMP_FREQ: + return IIO_VAL_INT_PLUS_NANO; + default: + return -EINVAL; + } +} + +static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( +"0.09765625 0.1953125 0.390625 0.78125 1.5625 3.125 6.25 12.5 25 50 100 200 400 800 1600 3200" +); + +static struct attribute *adxl345_attrs[] = { + &iio_const_attr_sampling_frequency_available.dev_attr.attr, + NULL, +}; + +static const struct attribute_group adxl345_attrs_group = { + .attrs = adxl345_attrs, +}; + static const struct iio_info adxl345_info = { + .attrs = &adxl345_attrs_group, .read_raw = adxl345_read_raw, .write_raw = adxl345_write_raw, + .write_raw_get_fmt = adxl345_write_raw_get_fmt, }; int adxl345_core_probe(struct device *dev, struct regmap *regmap,