From patchwork Sat Jan 13 13:37:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc CAPDEVILLE X-Patchwork-Id: 10162223 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7782360390 for ; Sat, 13 Jan 2018 13:38:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 66A9228B16 for ; Sat, 13 Jan 2018 13:38:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5B88E28B1C; Sat, 13 Jan 2018 13:38:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E4B2628B16 for ; Sat, 13 Jan 2018 13:38:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755218AbeAMNhq (ORCPT ); Sat, 13 Jan 2018 08:37:46 -0500 Received: from smtp04.smtpout.orange.fr ([80.12.242.126]:48515 "EHLO smtp.smtpout.orange.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755187AbeAMNhn (ORCPT ); Sat, 13 Jan 2018 08:37:43 -0500 Received: from azrael.lan ([92.133.211.154]) by mwinf5d51 with ME id xpdc1w00R3LRieL03pddD0; Sat, 13 Jan 2018 14:37:42 +0100 X-ME-Helo: azrael.lan X-ME-Date: Sat, 13 Jan 2018 14:37:42 +0100 X-ME-IP: 92.133.211.154 Received: (nullmailer pid 25099 invoked by uid 1000); Sat, 13 Jan 2018 13:37:10 -0000 From: Marc CAPDEVILLE To: Kevin Tsai Cc: Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , Mika Westerberg , Wolfram Sang , linux-iio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org, Marc CAPDEVILLE Subject: [PATCH v7 4/4] iio : cm32181 : cosmetic cleanup Date: Sat, 13 Jan 2018 14:37:05 +0100 Message-Id: <20180113133705.25044-4-m.capdeville@no-log.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180113133705.25044-1-m.capdeville@no-log.org> References: <20180113133705.25044-1-m.capdeville@no-log.org> Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Somme cosmetic cleanup suggested by Peter Meerwald-Stadler. Macro name : MLUX_PER_LUX => CM32181_MLUX_PER_LUX Constante name : als_it_bits => cm32181_als_it_bits als_it_value => cm32181_als_it_value Comment : Registers Address => Register Addresses Suggested-by: Peter Meerwald-Stadler Signed-off-by: Marc CAPDEVILLE Acked-by: Jonathan Cameron --- drivers/iio/light/cm32181.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/iio/light/cm32181.c b/drivers/iio/light/cm32181.c index eae5b7cc6878..8fc01c8d4522 100644 --- a/drivers/iio/light/cm32181.c +++ b/drivers/iio/light/cm32181.c @@ -22,7 +22,7 @@ #include #include -/* Registers Address */ +/* Register Addresses */ #define CM32181_REG_ADDR_CMD 0x00 #define CM32181_REG_ADDR_ALS 0x04 #define CM32181_REG_ADDR_STATUS 0x06 @@ -48,7 +48,7 @@ #define CM32181_MLUX_PER_BIT_BASE_IT 800000 /* Based on IT=800ms */ #define CM32181_CALIBSCALE_DEFAULT 1000 #define CM32181_CALIBSCALE_RESOLUTION 1000 -#define MLUX_PER_LUX 1000 +#define CM32181_MLUX_PER_LUX 1000 #define CM32181_ID 0x81 #define CM3218_ID 0x18 @@ -57,8 +57,8 @@ static const u8 cm32181_reg[CM32181_CONF_REG_NUM] = { CM32181_REG_ADDR_CMD, }; -static const int als_it_bits[] = {12, 8, 0, 1, 2, 3}; -static const int als_it_value[] = {25000, 50000, 100000, 200000, 400000, +static const int cm32181_als_it_bits[] = {12, 8, 0, 1, 2, 3}; +static const int cm32181_als_it_value[] = {25000, 50000, 100000, 200000, 400000, 800000}; struct cm32181_chip { @@ -124,9 +124,9 @@ static int cm32181_read_als_it(struct cm32181_chip *cm32181, int *val2) als_it = cm32181->conf_regs[CM32181_REG_ADDR_CMD]; als_it &= CM32181_CMD_ALS_IT_MASK; als_it >>= CM32181_CMD_ALS_IT_SHIFT; - for (i = 0; i < ARRAY_SIZE(als_it_bits); i++) { - if (als_it == als_it_bits[i]) { - *val2 = als_it_value[i]; + for (i = 0; i < ARRAY_SIZE(cm32181_als_it_bits); i++) { + if (als_it == cm32181_als_it_bits[i]) { + *val2 = cm32181_als_it_value[i]; return IIO_VAL_INT_PLUS_MICRO; } } @@ -149,14 +149,14 @@ static int cm32181_write_als_it(struct cm32181_chip *cm32181, int val) u16 als_it; int ret, i, n; - n = ARRAY_SIZE(als_it_value); + n = ARRAY_SIZE(cm32181_als_it_value); for (i = 0; i < n; i++) - if (val <= als_it_value[i]) + if (val <= cm32181_als_it_value[i]) break; if (i >= n) i = n - 1; - als_it = als_it_bits[i]; + als_it = cm32181_als_it_bits[i]; als_it <<= CM32181_CMD_ALS_IT_SHIFT; mutex_lock(&cm32181->lock); @@ -202,7 +202,7 @@ static int cm32181_get_lux(struct cm32181_chip *cm32181) lux *= ret; lux *= cm32181->calibscale; lux /= CM32181_CALIBSCALE_RESOLUTION; - lux /= MLUX_PER_LUX; + lux /= CM32181_MLUX_PER_LUX; if (lux > 0xFFFF) lux = 0xFFFF; @@ -270,9 +270,9 @@ static ssize_t cm32181_get_it_available(struct device *dev, { int i, n, len; - n = ARRAY_SIZE(als_it_value); + n = ARRAY_SIZE(cm32181_als_it_value); for (i = 0, len = 0; i < n; i++) - len += sprintf(buf + len, "0.%06u ", als_it_value[i]); + len += sprintf(buf + len, "0.%06u ", cm32181_als_it_value[i]); return len + sprintf(buf + len, "\n"); }