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[188.118.3.185]) by smtp.gmail.com with ESMTPSA id w48sm1421606eda.88.2019.02.18.06.03.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 18 Feb 2019 06:03:48 -0800 (PST) From: Patrick Havelange To: Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , Rob Herring , Mark Rutland , Shawn Guo , Li Yang , Daniel Lezcano , Thomas Gleixner , Thierry Reding , Esben Haabendal , William Breathitt Gray , Linus Walleij , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: Patrick Havelange Subject: [PATCH 2/8] drivers/pwm: pwm-fsl-ftm: use common header for FlexTimer #defines Date: Mon, 18 Feb 2019 15:03:15 +0100 Message-Id: <20190218140321.19166-2-patrick.havelange@essensium.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190218140321.19166-1-patrick.havelange@essensium.com> References: <20190218140321.19166-1-patrick.havelange@essensium.com> Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This also fixes the wrong value for the previously defined FTM_MODE_INIT macro (it was not used). Signed-off-by: Patrick Havelange Reviewed-by: Esben Haabendal --- drivers/pwm/pwm-fsl-ftm.c | 44 +-------------------------------------- 1 file changed, 1 insertion(+), 43 deletions(-) diff --git a/drivers/pwm/pwm-fsl-ftm.c b/drivers/pwm/pwm-fsl-ftm.c index 883378d055c6..f21ea1b97116 100644 --- a/drivers/pwm/pwm-fsl-ftm.c +++ b/drivers/pwm/pwm-fsl-ftm.c @@ -22,51 +22,9 @@ #include #include #include +#include -#define FTM_SC 0x00 -#define FTM_SC_CLK_MASK_SHIFT 3 -#define FTM_SC_CLK_MASK (3 << FTM_SC_CLK_MASK_SHIFT) #define FTM_SC_CLK(c) (((c) + 1) << FTM_SC_CLK_MASK_SHIFT) -#define FTM_SC_PS_MASK 0x7 - -#define FTM_CNT 0x04 -#define FTM_MOD 0x08 - -#define FTM_CSC_BASE 0x0C -#define FTM_CSC_MSB BIT(5) -#define FTM_CSC_MSA BIT(4) -#define FTM_CSC_ELSB BIT(3) -#define FTM_CSC_ELSA BIT(2) -#define FTM_CSC(_channel) (FTM_CSC_BASE + ((_channel) * 8)) - -#define FTM_CV_BASE 0x10 -#define FTM_CV(_channel) (FTM_CV_BASE + ((_channel) * 8)) - -#define FTM_CNTIN 0x4C -#define FTM_STATUS 0x50 - -#define FTM_MODE 0x54 -#define FTM_MODE_FTMEN BIT(0) -#define FTM_MODE_INIT BIT(2) -#define FTM_MODE_PWMSYNC BIT(3) - -#define FTM_SYNC 0x58 -#define FTM_OUTINIT 0x5C -#define FTM_OUTMASK 0x60 -#define FTM_COMBINE 0x64 -#define FTM_DEADTIME 0x68 -#define FTM_EXTTRIG 0x6C -#define FTM_POL 0x70 -#define FTM_FMS 0x74 -#define FTM_FILTER 0x78 -#define FTM_FLTCTRL 0x7C -#define FTM_QDCTRL 0x80 -#define FTM_CONF 0x84 -#define FTM_FLTPOL 0x88 -#define FTM_SYNCONF 0x8C -#define FTM_INVCTRL 0x90 -#define FTM_SWOCTRL 0x94 -#define FTM_PWMLOAD 0x98 enum fsl_pwm_clk { FSL_PWM_CLK_SYS,