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Thu, 19 Dec 2019 05:48:19 -0800 Received: from SCSQMBX10.ad.analog.com (10.77.17.5) by SCSQMBX10.ad.analog.com (10.77.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1779.2; Thu, 19 Dec 2019 05:48:17 -0800 Received: from zeus.spd.analog.com (10.64.82.11) by SCSQMBX10.ad.analog.com (10.77.17.5) with Microsoft SMTP Server id 15.1.1779.2 via Frontend Transport; Thu, 19 Dec 2019 05:48:16 -0800 Received: from mircea-Latitude-E6540.ad.analog.com ([10.48.65.128]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id xBJDmBON001170; Thu, 19 Dec 2019 08:48:12 -0500 From: Mircea Caprioru To: CC: , , , , , , , , Mircea Caprioru Subject: [PATCH 1/3] dt-bindings: iio: frequency: Add docs for LTC6952 Date: Thu, 19 Dec 2019 15:48:08 +0200 Message-ID: <20191219134810.6677-1-mircea.caprioru@analog.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-ADIRoutedOnPrem: True X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:137.71.25.57;IPV:;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(39860400002)(396003)(136003)(346002)(376002)(189003)(199004)(6916009)(86362001)(4326008)(107886003)(5660300002)(2906002)(54906003)(426003)(7696005)(2616005)(336012)(26005)(186003)(70586007)(70206006)(7636002)(246002)(36756003)(316002)(44832011)(8676002)(1076003)(966005)(356004)(6666004)(478600001)(8936002);DIR:OUT;SFP:1101;SCL:1;SRVR:BN7PR03MB3412;H:nwd2mta2.analog.com;FPR:;SPF:Pass;LANG:en;PTR:nwd2mail11.analog.com;MX:1;A:1; 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Signed-off-by: Mircea Caprioru --- .../bindings/iio/frequency/adi,ltc6952.yaml | 127 ++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/frequency/adi,ltc6952.yaml diff --git a/Documentation/devicetree/bindings/iio/frequency/adi,ltc6952.yaml b/Documentation/devicetree/bindings/iio/frequency/adi,ltc6952.yaml new file mode 100644 index 000000000000..a28c773c3948 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/frequency/adi,ltc6952.yaml @@ -0,0 +1,127 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2019 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bindings/iio/frequency/adi,ltc6952.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices LTC6952 ultralow jitter, JESD204B/C clock generation IC. + +maintainers: + - Mircea Caprioru + +description: | + Analog Devices LTC6952 ultralow jitter, JESD204B/C clock generation IC. + https://www.analog.com/media/en/technical-documentation/data-sheets/ltc6952.pdf + +properties: + compatible: + enum: + - adi,ltc6952 + + reg: + maxItems: 1 + + clock-output-names: + description: | + Clock output signal names indexed by the first cell in the clock + specifier (see clock/clock-bindings.txt) + maxItems: 1 + + adi,vco-frequency-hz: + description: | + VCO input frequency. This is fed to the internal distribution path and + feedback dividers. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + maxItems: 1 + + adi,ref-frequency-hz: + description: | + Reference input frequency. This is fed in the reference divider. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + maxItems: 1 + +required: + - compatible + - reg + - clock-output-names + +patternProperties: + "^channel@[0-9]$": + type: object + description: Represents the external channels which are connected to the device. + + properties: + reg: + description: | + The channel number. It can have up to 11 channels numbered from 0 to 10. + maxItems: 1 + + adi,extended-name: + description: Descriptive channel name. + maxItems: 1 + + adi,divider: + description: | + Channel divider. This divides the incoming VCO frequency. + maxItems: 1 + + adi,digital-delay: + description: | + Each output divider can have the start time of the output delayed by + integer multiples of half of the VCO period after a synchronization + event. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + - maximum: 4095 + maxItems: 1 + + adi,analog-delay: + description: | + Each output has a fine analog delay feature to further adjust its + output delay time (tADELx) in small steps. + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 0 + - maximum: 63 + maxItems: 1 + + required: + - reg + +examples: + - | + ltc6952@0 { + compatible = "adi,ltc6952"; + reg = <0>; + + #address-cells = <1>; + #size-cells = <0>; + + spi-max-frequency = <10000000>; + + clock-output-names = "ltc6952_out0", "ltc6952_out1", "ltc6952_out2", + "ltc6952_out3", "ltc6952_out4", "ltc6952_out5", "ltc6952_out6", + "ltc6952_out7", "ltc6952_out8", "ltc6952_out9", "ltc6952_out10"; + #clock-cells = <1>; + + adi,vco-frequency-hz = <4000000000>; + adi,ref-frequency-hz = <100000000>; + + ltc6952_c0: channel@0 { + reg = <0>; + adi,extended-name = "REF_CLK"; + adi,divider = <10>; + adi,digital-delay = <100>; + adi,analog-delay = <0>; + }; + + ltc6952_c1: channel@1 { + reg = <1>; + adi,extended-name = "TEST_CLK"; + adi,divider = <10>; + }; + };