| Message ID | 20200916092731.77220-1-alexandru.ardelean@analog.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] iio: frequency: adf4350: Replace indio_dev->mlock with own device lock | expand |
On Wed, 16 Sep 2020 12:27:31 +0300 Alexandru Ardelean <alexandru.ardelean@analog.com> wrote: > From: Sergiu Cuciurean <sergiu.cuciurean@analog.com> > > As part of the general cleanup of indio_dev->mlock, this change replaces > it with a local lock. > The lock protect the state of the device from potential concurrent writes. > The device is configured via a sequence of SPI writes, and this lock is > meant to prevent the start of another sequence before another one has > finished. > > This is part of a bigger cleanup. > Link: https://lore.kernel.org/linux-iio/CA+U=Dsoo6YABe5ODLp+eFNPGFDjk5ZeQEceGkqjxXcVEhLWubw@mail.gmail.com/ > > Signed-off-by: Sergiu Cuciurean <sergiu.cuciurean@analog.com> > Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Applied > --- > drivers/iio/frequency/adf4350.c | 21 +++++++++++++++------ > 1 file changed, 15 insertions(+), 6 deletions(-) > > diff --git a/drivers/iio/frequency/adf4350.c b/drivers/iio/frequency/adf4350.c > index 409c9c47161e..82c050a3899d 100644 > --- a/drivers/iio/frequency/adf4350.c > +++ b/drivers/iio/frequency/adf4350.c > @@ -47,6 +47,13 @@ struct adf4350_state { > unsigned long regs[6]; > unsigned long regs_hw[6]; > unsigned long long freq_req; > + /* > + * Lock to protect the state of the device from potential concurrent > + * writes. The device is configured via a sequence of SPI writes, > + * and this lock is meant to prevent the start of another sequence > + * before another one has finished. > + */ > + struct mutex lock; > /* > * DMA (thus cache coherency maintenance) requires the > * transfer buffers to live in their own cache lines. > @@ -99,7 +106,7 @@ static int adf4350_reg_access(struct iio_dev *indio_dev, > if (reg > ADF4350_REG5) > return -EINVAL; > > - mutex_lock(&indio_dev->mlock); > + mutex_lock(&st->lock); > if (readval == NULL) { > st->regs[reg] = writeval & ~(BIT(0) | BIT(1) | BIT(2)); > ret = adf4350_sync_config(st); > @@ -107,7 +114,7 @@ static int adf4350_reg_access(struct iio_dev *indio_dev, > *readval = st->regs_hw[reg]; > ret = 0; > } > - mutex_unlock(&indio_dev->mlock); > + mutex_unlock(&st->lock); > > return ret; > } > @@ -254,7 +261,7 @@ static ssize_t adf4350_write(struct iio_dev *indio_dev, > if (ret) > return ret; > > - mutex_lock(&indio_dev->mlock); > + mutex_lock(&st->lock); > switch ((u32)private) { > case ADF4350_FREQ: > ret = adf4350_set_freq(st, readin); > @@ -295,7 +302,7 @@ static ssize_t adf4350_write(struct iio_dev *indio_dev, > default: > ret = -EINVAL; > } > - mutex_unlock(&indio_dev->mlock); > + mutex_unlock(&st->lock); > > return ret ? ret : len; > } > @@ -309,7 +316,7 @@ static ssize_t adf4350_read(struct iio_dev *indio_dev, > unsigned long long val; > int ret = 0; > > - mutex_lock(&indio_dev->mlock); > + mutex_lock(&st->lock); > switch ((u32)private) { > case ADF4350_FREQ: > val = (u64)((st->r0_int * st->r1_mod) + st->r0_fract) * > @@ -338,7 +345,7 @@ static ssize_t adf4350_read(struct iio_dev *indio_dev, > ret = -EINVAL; > val = 0; > } > - mutex_unlock(&indio_dev->mlock); > + mutex_unlock(&st->lock); > > return ret < 0 ? ret : sprintf(buf, "%llu\n", val); > } > @@ -539,6 +546,8 @@ static int adf4350_probe(struct spi_device *spi) > indio_dev->channels = &adf4350_chan; > indio_dev->num_channels = 1; > > + mutex_init(&st->lock); > + > st->chspc = pdata->channel_spacing; > if (clk) { > st->clk = clk;
diff --git a/drivers/iio/frequency/adf4350.c b/drivers/iio/frequency/adf4350.c index 409c9c47161e..82c050a3899d 100644 --- a/drivers/iio/frequency/adf4350.c +++ b/drivers/iio/frequency/adf4350.c @@ -47,6 +47,13 @@ struct adf4350_state { unsigned long regs[6]; unsigned long regs_hw[6]; unsigned long long freq_req; + /* + * Lock to protect the state of the device from potential concurrent + * writes. The device is configured via a sequence of SPI writes, + * and this lock is meant to prevent the start of another sequence + * before another one has finished. + */ + struct mutex lock; /* * DMA (thus cache coherency maintenance) requires the * transfer buffers to live in their own cache lines. @@ -99,7 +106,7 @@ static int adf4350_reg_access(struct iio_dev *indio_dev, if (reg > ADF4350_REG5) return -EINVAL; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); if (readval == NULL) { st->regs[reg] = writeval & ~(BIT(0) | BIT(1) | BIT(2)); ret = adf4350_sync_config(st); @@ -107,7 +114,7 @@ static int adf4350_reg_access(struct iio_dev *indio_dev, *readval = st->regs_hw[reg]; ret = 0; } - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret; } @@ -254,7 +261,7 @@ static ssize_t adf4350_write(struct iio_dev *indio_dev, if (ret) return ret; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); switch ((u32)private) { case ADF4350_FREQ: ret = adf4350_set_freq(st, readin); @@ -295,7 +302,7 @@ static ssize_t adf4350_write(struct iio_dev *indio_dev, default: ret = -EINVAL; } - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret ? ret : len; } @@ -309,7 +316,7 @@ static ssize_t adf4350_read(struct iio_dev *indio_dev, unsigned long long val; int ret = 0; - mutex_lock(&indio_dev->mlock); + mutex_lock(&st->lock); switch ((u32)private) { case ADF4350_FREQ: val = (u64)((st->r0_int * st->r1_mod) + st->r0_fract) * @@ -338,7 +345,7 @@ static ssize_t adf4350_read(struct iio_dev *indio_dev, ret = -EINVAL; val = 0; } - mutex_unlock(&indio_dev->mlock); + mutex_unlock(&st->lock); return ret < 0 ? ret : sprintf(buf, "%llu\n", val); } @@ -539,6 +546,8 @@ static int adf4350_probe(struct spi_device *spi) indio_dev->channels = &adf4350_chan; indio_dev->num_channels = 1; + mutex_init(&st->lock); + st->chspc = pdata->channel_spacing; if (clk) { st->clk = clk;