| Message ID | 20210902215144.507243-25-miquel.raynal@bootlin.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | TI AM437X ADC1 | expand |
On Thu, 2 Sep 2021 23:51:22 +0200 Miquel Raynal <miquel.raynal@bootlin.com> wrote: > Harmonize the spacing within macro definitions. > > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> LGTM Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> > --- > include/linux/mfd/ti_am335x_tscadc.h | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h > index 334ce1a879df..efafecfc87a7 100644 > --- a/include/linux/mfd/ti_am335x_tscadc.h > +++ b/include/linux/mfd/ti_am335x_tscadc.h > @@ -41,7 +41,7 @@ > /* Step Enable */ > #define STEPENB_MASK (0x1FFFF << 0) > #define STEPENB(val) ((val) << 0) > -#define ENB(val) (1 << (val)) > +#define ENB(val) (1 << (val)) > #define STPENB_STEPENB STEPENB(0x1FFFF) > #define STPENB_STEPENB_TC STEPENB(0x1FFF) > > @@ -122,15 +122,15 @@ > #define CNTRLREG_TSCENB BIT(7) > > /* FIFO READ Register */ > -#define FIFOREAD_DATA_MASK (0xfff << 0) > -#define FIFOREAD_CHNLID_MASK (0xf << 16) > +#define FIFOREAD_DATA_MASK (0xfff << 0) > +#define FIFOREAD_CHNLID_MASK (0xf << 16) > > /* DMA ENABLE/CLEAR Register */ > #define DMA_FIFO0 BIT(0) > #define DMA_FIFO1 BIT(1) > > /* Sequencer Status */ > -#define SEQ_STATUS BIT(5) > +#define SEQ_STATUS BIT(5) > #define CHARGE_STEP 0x11 > > #define ADC_CLK 3000000 > @@ -150,7 +150,7 @@ > * > * max processing time: 266431 * 308ns = 83ms(approx) > */ > -#define IDLE_TIMEOUT 83 /* milliseconds */ > +#define IDLE_TIMEOUT 83 /* milliseconds */ > > #define TSCADC_CELLS 2 >
diff --git a/include/linux/mfd/ti_am335x_tscadc.h b/include/linux/mfd/ti_am335x_tscadc.h index 334ce1a879df..efafecfc87a7 100644 --- a/include/linux/mfd/ti_am335x_tscadc.h +++ b/include/linux/mfd/ti_am335x_tscadc.h @@ -41,7 +41,7 @@ /* Step Enable */ #define STEPENB_MASK (0x1FFFF << 0) #define STEPENB(val) ((val) << 0) -#define ENB(val) (1 << (val)) +#define ENB(val) (1 << (val)) #define STPENB_STEPENB STEPENB(0x1FFFF) #define STPENB_STEPENB_TC STEPENB(0x1FFF) @@ -122,15 +122,15 @@ #define CNTRLREG_TSCENB BIT(7) /* FIFO READ Register */ -#define FIFOREAD_DATA_MASK (0xfff << 0) -#define FIFOREAD_CHNLID_MASK (0xf << 16) +#define FIFOREAD_DATA_MASK (0xfff << 0) +#define FIFOREAD_CHNLID_MASK (0xf << 16) /* DMA ENABLE/CLEAR Register */ #define DMA_FIFO0 BIT(0) #define DMA_FIFO1 BIT(1) /* Sequencer Status */ -#define SEQ_STATUS BIT(5) +#define SEQ_STATUS BIT(5) #define CHARGE_STEP 0x11 #define ADC_CLK 3000000 @@ -150,7 +150,7 @@ * * max processing time: 266431 * 308ns = 83ms(approx) */ -#define IDLE_TIMEOUT 83 /* milliseconds */ +#define IDLE_TIMEOUT 83 /* milliseconds */ #define TSCADC_CELLS 2
Harmonize the spacing within macro definitions. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> --- include/linux/mfd/ti_am335x_tscadc.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)