Message ID | 20220106125947.139523-3-gengcixi@gmail.com (mailing list archive) |
---|---|
State | Changes Requested |
Headers | show |
Series | iio: adc: sc27xx: adjust structure and add PMIC's support | expand |
On Thu, Jan 6, 2022 at 9:00 PM Cixi Geng <gengcixi@gmail.com> wrote: > > From: Cixi Geng <cixi.geng1@unisoc.com> > > Fix wrong configuration value of SC27XX_ADC_SCALE_MASK and > SC27XX_ADC_SCALE_SHIFT by spec documetation. > > Signed-off-by: Yuming Zhu <yuming.zhu1@unisoc.com> > Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com> Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> > --- > drivers/iio/adc/sc27xx_adc.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c > index 00098caf6d9e..aee076c8e2b1 100644 > --- a/drivers/iio/adc/sc27xx_adc.c > +++ b/drivers/iio/adc/sc27xx_adc.c > @@ -36,8 +36,8 @@ > > /* Bits and mask definition for SC27XX_ADC_CH_CFG register */ > #define SC27XX_ADC_CHN_ID_MASK GENMASK(4, 0) > -#define SC27XX_ADC_SCALE_MASK GENMASK(10, 8) > -#define SC27XX_ADC_SCALE_SHIFT 8 > +#define SC27XX_ADC_SCALE_MASK GENMASK(10, 9) > +#define SC27XX_ADC_SCALE_SHIFT 9 > > /* Bits definitions for SC27XX_ADC_INT_EN registers */ > #define SC27XX_ADC_IRQ_EN BIT(0) > -- > 2.25.1 >
On Fri, 7 Jan 2022 14:55:15 +0800 Baolin Wang <baolin.wang7@gmail.com> wrote: > On Thu, Jan 6, 2022 at 9:00 PM Cixi Geng <gengcixi@gmail.com> wrote: > > > > From: Cixi Geng <cixi.geng1@unisoc.com> > > > > Fix wrong configuration value of SC27XX_ADC_SCALE_MASK and > > SC27XX_ADC_SCALE_SHIFT by spec documetation. > > > > Signed-off-by: Yuming Zhu <yuming.zhu1@unisoc.com> > > Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com> > > Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> Fixes: tag for backports? or is this having no visible result today? Jonathan > > > --- > > drivers/iio/adc/sc27xx_adc.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c > > index 00098caf6d9e..aee076c8e2b1 100644 > > --- a/drivers/iio/adc/sc27xx_adc.c > > +++ b/drivers/iio/adc/sc27xx_adc.c > > @@ -36,8 +36,8 @@ > > > > /* Bits and mask definition for SC27XX_ADC_CH_CFG register */ > > #define SC27XX_ADC_CHN_ID_MASK GENMASK(4, 0) > > -#define SC27XX_ADC_SCALE_MASK GENMASK(10, 8) > > -#define SC27XX_ADC_SCALE_SHIFT 8 > > +#define SC27XX_ADC_SCALE_MASK GENMASK(10, 9) > > +#define SC27XX_ADC_SCALE_SHIFT 9 > > > > /* Bits definitions for SC27XX_ADC_INT_EN registers */ > > #define SC27XX_ADC_IRQ_EN BIT(0) > > -- > > 2.25.1 > > > >
diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c index 00098caf6d9e..aee076c8e2b1 100644 --- a/drivers/iio/adc/sc27xx_adc.c +++ b/drivers/iio/adc/sc27xx_adc.c @@ -36,8 +36,8 @@ /* Bits and mask definition for SC27XX_ADC_CH_CFG register */ #define SC27XX_ADC_CHN_ID_MASK GENMASK(4, 0) -#define SC27XX_ADC_SCALE_MASK GENMASK(10, 8) -#define SC27XX_ADC_SCALE_SHIFT 8 +#define SC27XX_ADC_SCALE_MASK GENMASK(10, 9) +#define SC27XX_ADC_SCALE_SHIFT 9 /* Bits definitions for SC27XX_ADC_INT_EN registers */ #define SC27XX_ADC_IRQ_EN BIT(0)