| Message ID | 20220106125947.139523-5-gengcixi@gmail.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | iio: adc: sc27xx: adjust structure and add PMIC's support | expand |
On Thu, Jan 6, 2022 at 9:00 PM Cixi Geng <gengcixi@gmail.com> wrote: > > From: Cixi Geng <cixi.geng1@unisoc.com> > > sc2720 and sc2721 is the product of sc27xx series. > > Signed-off-by: Yuming Zhu <yuming.zhu1@unisoc.com> > Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com> > --- > drivers/iio/adc/sc27xx_adc.c | 198 +++++++++++++++++++++++++++++++++++ > 1 file changed, 198 insertions(+) > > diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c > index d2712e54ee79..7b5c66660ac9 100644 > --- a/drivers/iio/adc/sc27xx_adc.c > +++ b/drivers/iio/adc/sc27xx_adc.c > @@ -9,11 +9,13 @@ > #include <linux/of_device.h> > #include <linux/platform_device.h> > #include <linux/regmap.h> > +#include <linux/regulator/consumer.h> > #include <linux/slab.h> > > /* PMIC global registers definition */ > #define SC2731_MODULE_EN 0xc08 > #define SC27XX_MODULE_ADC_EN BIT(5) > +#define SC2721_ARM_CLK_EN 0xc0c > #define SC2731_ARM_CLK_EN 0xc10 > #define SC27XX_CLK_ADC_EN BIT(5) > #define SC27XX_CLK_ADC_CLK_EN BIT(6) > @@ -37,7 +39,9 @@ > /* Bits and mask definition for SC27XX_ADC_CH_CFG register */ > #define SC27XX_ADC_CHN_ID_MASK GENMASK(4, 0) > #define SC27XX_ADC_SCALE_MASK GENMASK(10, 9) > +#define SC2721_ADC_SCALE_MASK BIT(5) > #define SC27XX_ADC_SCALE_SHIFT 9 > +#define SC2721_ADC_SCALE_SHIFT 5 > > /* Bits definitions for SC27XX_ADC_INT_EN registers */ > #define SC27XX_ADC_IRQ_EN BIT(0) > @@ -67,8 +71,21 @@ > #define SC27XX_RATIO_NUMERATOR_OFFSET 16 > #define SC27XX_RATIO_DENOMINATOR_MASK GENMASK(15, 0) > > +/* ADC specific channel reference voltage 3.5V */ > +#define SC27XX_ADC_REFVOL_VDD35 3500000 > + > +/* ADC default channel reference voltage is 2.8V */ > +#define SC27XX_ADC_REFVOL_VDD28 2800000 > + > +enum sc27xx_pmic_type { > + SC27XX_ADC, > + SC2721_ADC, > +}; > + > struct sc27xx_adc_data { > + struct iio_dev *indio_dev; Why add an unused member? > struct device *dev; > + struct regulator *volref; > struct regmap *regmap; > /* > * One hardware spinlock to synchronize between the multiple > @@ -87,6 +104,7 @@ struct sc27xx_adc_data { > * in the device data structure. > */ > struct sc27xx_adc_variant_data { > + enum sc27xx_pmic_type pmic_type; > u32 module_en; > u32 clk_en; > u32 scale_shift; > @@ -187,6 +205,94 @@ static int sc27xx_adc_scale_calibration(struct sc27xx_adc_data *data, > return 0; > } > > +static int sc2720_adc_get_ratio(int channel, int scale) > +{ > + switch (channel) { > + case 14: > + switch (scale) { > + case 0: > + return SC27XX_VOLT_RATIO(68, 900); > + case 1: > + return SC27XX_VOLT_RATIO(68, 1760); > + case 2: > + return SC27XX_VOLT_RATIO(68, 2327); > + case 3: > + return SC27XX_VOLT_RATIO(68, 3654); > + default: > + return SC27XX_VOLT_RATIO(1, 1); > + } > + case 16: > + switch (scale) { > + case 0: > + return SC27XX_VOLT_RATIO(48, 100); > + case 1: > + return SC27XX_VOLT_RATIO(480, 1955); > + case 2: > + return SC27XX_VOLT_RATIO(480, 2586); > + case 3: > + return SC27XX_VOLT_RATIO(48, 406); > + default: > + return SC27XX_VOLT_RATIO(1, 1); > + } > + case 21: > + case 22: > + case 23: > + switch (scale) { > + case 0: > + return SC27XX_VOLT_RATIO(3, 8); > + case 1: > + return SC27XX_VOLT_RATIO(375, 1955); > + case 2: > + return SC27XX_VOLT_RATIO(375, 2586); > + case 3: > + return SC27XX_VOLT_RATIO(300, 3248); > + default: > + return SC27XX_VOLT_RATIO(1, 1); > + } > + default: > + switch (scale) { > + case 0: > + return SC27XX_VOLT_RATIO(1, 1); > + case 1: > + return SC27XX_VOLT_RATIO(1000, 1955); > + case 2: > + return SC27XX_VOLT_RATIO(1000, 2586); > + case 3: > + return SC27XX_VOLT_RATIO(100, 406); > + default: > + return SC27XX_VOLT_RATIO(1, 1); > + } > + } > + return SC27XX_VOLT_RATIO(1, 1); > +} > + > +static int sc2721_adc_get_ratio(int channel, int scale) > +{ > + switch (channel) { > + case 1: > + case 2: > + case 3: > + case 4: > + return scale ? SC27XX_VOLT_RATIO(400, 1025) : > + SC27XX_VOLT_RATIO(1, 1); > + case 5: > + return SC27XX_VOLT_RATIO(7, 29); > + case 7: > + case 9: > + return scale ? SC27XX_VOLT_RATIO(100, 125) : > + SC27XX_VOLT_RATIO(1, 1); > + case 14: > + return SC27XX_VOLT_RATIO(68, 900); > + case 16: > + return SC27XX_VOLT_RATIO(48, 100); > + case 19: > + return SC27XX_VOLT_RATIO(1, 3); > + default: > + return SC27XX_VOLT_RATIO(1, 1); > + } > + return SC27XX_VOLT_RATIO(1, 1); > +} > + > static int sc2731_adc_get_ratio(int channel, int scale) > { > switch (channel) { > @@ -215,6 +321,34 @@ static int sc2731_adc_get_ratio(int channel, int scale) > /* > * According to the datasheet set specific value on some channel. > */ > +static void sc2720_adc_scale_init(struct sc27xx_adc_data *data) > +{ > + int i; > + > + for (i = 0; i < SC27XX_ADC_CHANNEL_MAX; i++) { > + switch (i) { > + case 5: > + data->channel_scale[i] = 3; > + break; > + case 7: > + case 9: > + data->channel_scale[i] = 2; > + break; > + case 13: > + data->channel_scale[i] = 1; > + break; > + case 19: > + case 30: > + case 31: > + data->channel_scale[i] = 3; > + break; > + default: > + data->channel_scale[i] = 0; > + break; > + } > + } > +} Like previous comments, this is not needed. > + > static void sc2731_adc_scale_init(struct sc27xx_adc_data *data) > { > int i; > @@ -239,6 +373,24 @@ static int sc27xx_adc_read(struct sc27xx_adc_data *data, int channel, > return ret; > } > > + /* > + * According to the sc2721 chip data sheet, the reference voltage of > + * specific channel 30 and channel 31 in ADC module needs to be set from > + * the default 2.8v to 3.5v. > + */ > + if (data->var_data->pmic_type == SC2721_ADC) { > + if ((channel == 30) || (channel == 31)) { Combine the two branches please. > + ret = regulator_set_voltage(data->volref, > + SC27XX_ADC_REFVOL_VDD35, > + SC27XX_ADC_REFVOL_VDD35); > + if (ret) { > + dev_err(data->dev, "failed to set the volref 3.5V\n"); > + hwspin_unlock_raw(data->hwlock); > + return ret; > + } > + } > + } > + > ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL, > SC27XX_ADC_EN, SC27XX_ADC_EN); > if (ret) > @@ -293,6 +445,16 @@ static int sc27xx_adc_read(struct sc27xx_adc_data *data, int channel, > regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL, > SC27XX_ADC_EN, 0); > unlock_adc: > + if (data->var_data->pmic_type == SC2721_ADC) { > + if ((channel == 30) || (channel == 31)) { > + ret = regulator_set_voltage(data->volref, > + SC27XX_ADC_REFVOL_VDD28, > + SC27XX_ADC_REFVOL_VDD28); > + if (ret) > + dev_err(data->dev, "failed to set the volref 2.8V\n"); > + } > + } > + > hwspin_unlock_raw(data->hwlock); > > if (!ret) > @@ -522,6 +684,7 @@ static void sc27xx_adc_disable(void *_data) > } > > static const struct sc27xx_adc_variant_data sc2731_data = { > + .pmic_type = SC27XX_ADC, > .module_en = SC2731_MODULE_EN, > .clk_en = SC2731_ARM_CLK_EN, > .scale_shift = SC27XX_ADC_SCALE_SHIFT, > @@ -532,6 +695,30 @@ static const struct sc27xx_adc_variant_data sc2731_data = { > .get_ratio = sc2731_adc_get_ratio, > }; > > +static const struct sc27xx_adc_variant_data sc2721_data = { > + .pmic_type = SC2721_ADC, > + .module_en = SC2731_MODULE_EN, > + .clk_en = SC2721_ARM_CLK_EN, > + .scale_shift = SC2721_ADC_SCALE_SHIFT, > + .scale_mask = SC2721_ADC_SCALE_MASK, > + .bscale_cal = &sc2731_big_scale_graph_calib, > + .sscale_cal = &sc2731_small_scale_graph_calib, > + .init_scale = sc2731_adc_scale_init, > + .get_ratio = sc2721_adc_get_ratio, > +}; > + > +static const struct sc27xx_adc_variant_data sc2720_data = { > + .pmic_type = SC27XX_ADC, > + .module_en = SC2731_MODULE_EN, > + .clk_en = SC2721_ARM_CLK_EN, > + .scale_shift = SC27XX_ADC_SCALE_SHIFT, > + .scale_mask = SC27XX_ADC_SCALE_MASK, > + .bscale_cal = &big_scale_graph_calib, > + .sscale_cal = &small_scale_graph_calib, > + .init_scale = sc2720_adc_scale_init, > + .get_ratio = sc2720_adc_get_ratio, > +}; > + > static int sc27xx_adc_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > @@ -582,6 +769,15 @@ static int sc27xx_adc_probe(struct platform_device *pdev) > } > > sc27xx_data->dev = dev; > + if (pdata->pmic_type == SC2721_ADC) { > + sc27xx_data->volref = devm_regulator_get_optional(dev, "vref"); > + if (IS_ERR_OR_NULL(sc27xx_data->volref)) { devm_regulator_get_optional() never return NULL, please use IS_ERR(). > + ret = PTR_ERR(sc27xx_data->volref); Should check ret == -ENODEV, since -ENODEV means the regulator is not supplied which is not a error for 'OPTIONAL_GET' type. > + dev_err(dev, "err! ADC volref, err: %d\n", ret); Can you elaborate on the error message like other places in this driver? > + return ret; > + } > + } > + > sc27xx_data->var_data = pdata; > sc27xx_data->var_data->init_scale(sc27xx_data); > > @@ -611,6 +807,8 @@ static int sc27xx_adc_probe(struct platform_device *pdev) > > static const struct of_device_id sc27xx_adc_of_match[] = { > { .compatible = "sprd,sc2731-adc", .data = &sc2731_data}, > + { .compatible = "sprd,sc2721-adc", .data = &sc2721_data}, > + { .compatible = "sprd,sc2720-adc", .data = &sc2720_data}, > { } > }; > MODULE_DEVICE_TABLE(of, sc27xx_adc_of_match); > -- > 2.25.1 >
On Fri, 7 Jan 2022 15:16:15 +0800 Baolin Wang <baolin.wang7@gmail.com> wrote: > On Thu, Jan 6, 2022 at 9:00 PM Cixi Geng <gengcixi@gmail.com> wrote: > > > > From: Cixi Geng <cixi.geng1@unisoc.com> > > > > sc2720 and sc2721 is the product of sc27xx series. > > > > Signed-off-by: Yuming Zhu <yuming.zhu1@unisoc.com> > > Signed-off-by: Cixi Geng <cixi.geng1@unisoc.com> > > --- > > drivers/iio/adc/sc27xx_adc.c | 198 +++++++++++++++++++++++++++++++++++ > > 1 file changed, 198 insertions(+) > > > > diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c > > index d2712e54ee79..7b5c66660ac9 100644 > > --- a/drivers/iio/adc/sc27xx_adc.c > > +++ b/drivers/iio/adc/sc27xx_adc.c > > @@ -9,11 +9,13 @@ > > #include <linux/of_device.h> > > #include <linux/platform_device.h> > > #include <linux/regmap.h> > > +#include <linux/regulator/consumer.h> > > #include <linux/slab.h> > > > > /* PMIC global registers definition */ > > #define SC2731_MODULE_EN 0xc08 > > #define SC27XX_MODULE_ADC_EN BIT(5) > > +#define SC2721_ARM_CLK_EN 0xc0c > > #define SC2731_ARM_CLK_EN 0xc10 > > #define SC27XX_CLK_ADC_EN BIT(5) > > #define SC27XX_CLK_ADC_CLK_EN BIT(6) > > @@ -37,7 +39,9 @@ > > /* Bits and mask definition for SC27XX_ADC_CH_CFG register */ > > #define SC27XX_ADC_CHN_ID_MASK GENMASK(4, 0) > > #define SC27XX_ADC_SCALE_MASK GENMASK(10, 9) > > +#define SC2721_ADC_SCALE_MASK BIT(5) > > #define SC27XX_ADC_SCALE_SHIFT 9 > > +#define SC2721_ADC_SCALE_SHIFT 5 > > > > /* Bits definitions for SC27XX_ADC_INT_EN registers */ > > #define SC27XX_ADC_IRQ_EN BIT(0) > > @@ -67,8 +71,21 @@ > > #define SC27XX_RATIO_NUMERATOR_OFFSET 16 > > #define SC27XX_RATIO_DENOMINATOR_MASK GENMASK(15, 0) > > > > +/* ADC specific channel reference voltage 3.5V */ > > +#define SC27XX_ADC_REFVOL_VDD35 3500000 > > + > > +/* ADC default channel reference voltage is 2.8V */ > > +#define SC27XX_ADC_REFVOL_VDD28 2800000 > > + > > +enum sc27xx_pmic_type { > > + SC27XX_ADC, > > + SC2721_ADC, > > +}; > > + > > struct sc27xx_adc_data { > > + struct iio_dev *indio_dev; > > Why add an unused member? It's very very rarely a good architecture structure to have the data stored in iio_priv() have a pointer back to the indio_dev. Normally it implies somewhere the wrong level of structure is being passed to a function. So I'm glad it's not used :) > > > struct device *dev; > > + struct regulator *volref; > > struct regmap *regmap; > > /* > > * One hardware spinlock to synchronize between the multiple > > @@ -87,6 +104,7 @@ struct sc27xx_adc_data { > > * in the device data structure. > > */ ... > > > + > > static void sc2731_adc_scale_init(struct sc27xx_adc_data *data) > > { > > int i; > > @@ -239,6 +373,24 @@ static int sc27xx_adc_read(struct sc27xx_adc_data *data, int channel, > > return ret; > > } > > > > + /* > > + * According to the sc2721 chip data sheet, the reference voltage of > > + * specific channel 30 and channel 31 in ADC module needs to be set from > > + * the default 2.8v to 3.5v. That's horrible... :) Ah well... > > + */ > > + if (data->var_data->pmic_type == SC2721_ADC) { > > + if ((channel == 30) || (channel == 31)) { > > Combine the two branches please. > > > + ret = regulator_set_voltage(data->volref, > > + SC27XX_ADC_REFVOL_VDD35, > > + SC27XX_ADC_REFVOL_VDD35); > > + if (ret) { > > + dev_err(data->dev, "failed to set the volref 3.5V\n"); > > + hwspin_unlock_raw(data->hwlock); > > + return ret; > > + } > > + } > > + } > > + > > ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL, > > SC27XX_ADC_EN, SC27XX_ADC_EN); > > if (ret) > > @@ -293,6 +445,16 @@ static int sc27xx_adc_read(struct sc27xx_adc_data *data, int channel, > > regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL, > > SC27XX_ADC_EN, 0); > > unlock_adc: > > + if (data->var_data->pmic_type == SC2721_ADC) { > > + if ((channel == 30) || (channel == 31)) { > > + ret = regulator_set_voltage(data->volref, > > + SC27XX_ADC_REFVOL_VDD28, > > + SC27XX_ADC_REFVOL_VDD28); > > + if (ret) > > + dev_err(data->dev, "failed to set the volref 2.8V\n"); > > + } > > + } > > + > > hwspin_unlock_raw(data->hwlock); > > > > if (!ret) > > @@ -522,6 +684,7 @@ static void sc27xx_adc_disable(void *_data) > > } ... >
Hi Cixi,
url: https://github.com/0day-ci/linux/commits/Cixi-Geng/iio-adc-sc27xx-adjust-structure-and-add-PMIC-s-support/20220106-210151
base: https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git togreg
config: openrisc-randconfig-m031-20220106 (https://download.01.org/0day-ci/archive/20220108/202201080030.L51zYw0G-lkp@intel.com/config)
compiler: or1k-linux-gcc (GCC) 11.2.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
drivers/iio/adc/sc27xx_adc.c:461 sc27xx_adc_read() error: uninitialized symbol 'value'.
vim +/value +461 drivers/iio/adc/sc27xx_adc.c
5df362a6cf49ca Freeman Liu 2018-06-21 364 static int sc27xx_adc_read(struct sc27xx_adc_data *data, int channel,
5df362a6cf49ca Freeman Liu 2018-06-21 365 int scale, int *val)
5df362a6cf49ca Freeman Liu 2018-06-21 366 {
5df362a6cf49ca Freeman Liu 2018-06-21 367 int ret;
8de877d2bba5c3 Freeman Liu 2019-07-25 368 u32 tmp, value, status;
5df362a6cf49ca Freeman Liu 2018-06-21 369
5df362a6cf49ca Freeman Liu 2018-06-21 370 ret = hwspin_lock_timeout_raw(data->hwlock, SC27XX_ADC_HWLOCK_TIMEOUT);
5df362a6cf49ca Freeman Liu 2018-06-21 371 if (ret) {
5df362a6cf49ca Freeman Liu 2018-06-21 372 dev_err(data->dev, "timeout to get the hwspinlock\n");
5df362a6cf49ca Freeman Liu 2018-06-21 373 return ret;
5df362a6cf49ca Freeman Liu 2018-06-21 374 }
5df362a6cf49ca Freeman Liu 2018-06-21 375
cd6ab0edd81be2 Cixi Geng 2022-01-06 376 /*
cd6ab0edd81be2 Cixi Geng 2022-01-06 377 * According to the sc2721 chip data sheet, the reference voltage of
cd6ab0edd81be2 Cixi Geng 2022-01-06 378 * specific channel 30 and channel 31 in ADC module needs to be set from
cd6ab0edd81be2 Cixi Geng 2022-01-06 379 * the default 2.8v to 3.5v.
cd6ab0edd81be2 Cixi Geng 2022-01-06 380 */
cd6ab0edd81be2 Cixi Geng 2022-01-06 381 if (data->var_data->pmic_type == SC2721_ADC) {
cd6ab0edd81be2 Cixi Geng 2022-01-06 382 if ((channel == 30) || (channel == 31)) {
cd6ab0edd81be2 Cixi Geng 2022-01-06 383 ret = regulator_set_voltage(data->volref,
cd6ab0edd81be2 Cixi Geng 2022-01-06 384 SC27XX_ADC_REFVOL_VDD35,
cd6ab0edd81be2 Cixi Geng 2022-01-06 385 SC27XX_ADC_REFVOL_VDD35);
cd6ab0edd81be2 Cixi Geng 2022-01-06 386 if (ret) {
cd6ab0edd81be2 Cixi Geng 2022-01-06 387 dev_err(data->dev, "failed to set the volref 3.5V\n");
cd6ab0edd81be2 Cixi Geng 2022-01-06 388 hwspin_unlock_raw(data->hwlock);
cd6ab0edd81be2 Cixi Geng 2022-01-06 389 return ret;
cd6ab0edd81be2 Cixi Geng 2022-01-06 390 }
cd6ab0edd81be2 Cixi Geng 2022-01-06 391 }
cd6ab0edd81be2 Cixi Geng 2022-01-06 392 }
cd6ab0edd81be2 Cixi Geng 2022-01-06 393
5df362a6cf49ca Freeman Liu 2018-06-21 394 ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL,
5df362a6cf49ca Freeman Liu 2018-06-21 395 SC27XX_ADC_EN, SC27XX_ADC_EN);
5df362a6cf49ca Freeman Liu 2018-06-21 396 if (ret)
5df362a6cf49ca Freeman Liu 2018-06-21 397 goto unlock_adc;
5df362a6cf49ca Freeman Liu 2018-06-21 398
8de877d2bba5c3 Freeman Liu 2019-07-25 399 ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_INT_CLR,
8de877d2bba5c3 Freeman Liu 2019-07-25 400 SC27XX_ADC_IRQ_CLR, SC27XX_ADC_IRQ_CLR);
8de877d2bba5c3 Freeman Liu 2019-07-25 401 if (ret)
8de877d2bba5c3 Freeman Liu 2019-07-25 402 goto disable_adc;
Assume we hit a goto.
8de877d2bba5c3 Freeman Liu 2019-07-25 403
5df362a6cf49ca Freeman Liu 2018-06-21 404 /* Configure the channel id and scale */
b39db3bcbc9a96 Cixi Geng 2022-01-06 405 tmp = (scale << data->var_data->scale_shift) & data->var_data->scale_mask;
5df362a6cf49ca Freeman Liu 2018-06-21 406 tmp |= channel & SC27XX_ADC_CHN_ID_MASK;
5df362a6cf49ca Freeman Liu 2018-06-21 407 ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CH_CFG,
b39db3bcbc9a96 Cixi Geng 2022-01-06 408 SC27XX_ADC_CHN_ID_MASK |
b39db3bcbc9a96 Cixi Geng 2022-01-06 409 data->var_data->scale_mask,
5df362a6cf49ca Freeman Liu 2018-06-21 410 tmp);
5df362a6cf49ca Freeman Liu 2018-06-21 411 if (ret)
5df362a6cf49ca Freeman Liu 2018-06-21 412 goto disable_adc;
5df362a6cf49ca Freeman Liu 2018-06-21 413
5df362a6cf49ca Freeman Liu 2018-06-21 414 /* Select 12bit conversion mode, and only sample 1 time */
5df362a6cf49ca Freeman Liu 2018-06-21 415 tmp = SC27XX_ADC_12BIT_MODE;
5df362a6cf49ca Freeman Liu 2018-06-21 416 tmp |= (0 << SC27XX_ADC_RUN_NUM_SHIFT) & SC27XX_ADC_RUN_NUM_MASK;
5df362a6cf49ca Freeman Liu 2018-06-21 417 ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL,
5df362a6cf49ca Freeman Liu 2018-06-21 418 SC27XX_ADC_RUN_NUM_MASK | SC27XX_ADC_12BIT_MODE,
5df362a6cf49ca Freeman Liu 2018-06-21 419 tmp);
5df362a6cf49ca Freeman Liu 2018-06-21 420 if (ret)
5df362a6cf49ca Freeman Liu 2018-06-21 421 goto disable_adc;
5df362a6cf49ca Freeman Liu 2018-06-21 422
5df362a6cf49ca Freeman Liu 2018-06-21 423 ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL,
5df362a6cf49ca Freeman Liu 2018-06-21 424 SC27XX_ADC_CHN_RUN, SC27XX_ADC_CHN_RUN);
5df362a6cf49ca Freeman Liu 2018-06-21 425 if (ret)
5df362a6cf49ca Freeman Liu 2018-06-21 426 goto disable_adc;
5df362a6cf49ca Freeman Liu 2018-06-21 427
8de877d2bba5c3 Freeman Liu 2019-07-25 428 ret = regmap_read_poll_timeout(data->regmap,
8de877d2bba5c3 Freeman Liu 2019-07-25 429 data->base + SC27XX_ADC_INT_RAW,
8de877d2bba5c3 Freeman Liu 2019-07-25 430 status, (status & SC27XX_ADC_IRQ_RAW),
8de877d2bba5c3 Freeman Liu 2019-07-25 431 SC27XX_ADC_POLL_RAW_STATUS,
8de877d2bba5c3 Freeman Liu 2019-07-25 432 SC27XX_ADC_RDY_TIMEOUT);
8de877d2bba5c3 Freeman Liu 2019-07-25 433 if (ret) {
8de877d2bba5c3 Freeman Liu 2019-07-25 434 dev_err(data->dev, "read adc timeout, status = 0x%x\n", status);
8de877d2bba5c3 Freeman Liu 2019-07-25 435 goto disable_adc;
750ac07eb2c856 Freeman Liu 2018-11-09 436 }
5df362a6cf49ca Freeman Liu 2018-06-21 437
8de877d2bba5c3 Freeman Liu 2019-07-25 438 ret = regmap_read(data->regmap, data->base + SC27XX_ADC_DATA, &value);
value is initialized here.
8de877d2bba5c3 Freeman Liu 2019-07-25 439 if (ret)
8de877d2bba5c3 Freeman Liu 2019-07-25 440 goto disable_adc;
8de877d2bba5c3 Freeman Liu 2019-07-25 441
8de877d2bba5c3 Freeman Liu 2019-07-25 442 value &= SC27XX_ADC_DATA_MASK;
8de877d2bba5c3 Freeman Liu 2019-07-25 443
5df362a6cf49ca Freeman Liu 2018-06-21 444 disable_adc:
5df362a6cf49ca Freeman Liu 2018-06-21 445 regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL,
5df362a6cf49ca Freeman Liu 2018-06-21 446 SC27XX_ADC_EN, 0);
5df362a6cf49ca Freeman Liu 2018-06-21 447 unlock_adc:
cd6ab0edd81be2 Cixi Geng 2022-01-06 448 if (data->var_data->pmic_type == SC2721_ADC) {
cd6ab0edd81be2 Cixi Geng 2022-01-06 449 if ((channel == 30) || (channel == 31)) {
cd6ab0edd81be2 Cixi Geng 2022-01-06 450 ret = regulator_set_voltage(data->volref,
cd6ab0edd81be2 Cixi Geng 2022-01-06 451 SC27XX_ADC_REFVOL_VDD28,
cd6ab0edd81be2 Cixi Geng 2022-01-06 452 SC27XX_ADC_REFVOL_VDD28);
cd6ab0edd81be2 Cixi Geng 2022-01-06 453 if (ret)
cd6ab0edd81be2 Cixi Geng 2022-01-06 454 dev_err(data->dev, "failed to set the volref 2.8V\n");
ret is reset here.
cd6ab0edd81be2 Cixi Geng 2022-01-06 455 }
cd6ab0edd81be2 Cixi Geng 2022-01-06 456 }
cd6ab0edd81be2 Cixi Geng 2022-01-06 457
5df362a6cf49ca Freeman Liu 2018-06-21 458 hwspin_unlock_raw(data->hwlock);
5df362a6cf49ca Freeman Liu 2018-06-21 459
5df362a6cf49ca Freeman Liu 2018-06-21 460 if (!ret)
8de877d2bba5c3 Freeman Liu 2019-07-25 @461 *val = value;
Since ret is reset, it is no long connected to value.
5df362a6cf49ca Freeman Liu 2018-06-21 462
5df362a6cf49ca Freeman Liu 2018-06-21 463 return ret;
5df362a6cf49ca Freeman Liu 2018-06-21 464 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c index d2712e54ee79..7b5c66660ac9 100644 --- a/drivers/iio/adc/sc27xx_adc.c +++ b/drivers/iio/adc/sc27xx_adc.c @@ -9,11 +9,13 @@ #include <linux/of_device.h> #include <linux/platform_device.h> #include <linux/regmap.h> +#include <linux/regulator/consumer.h> #include <linux/slab.h> /* PMIC global registers definition */ #define SC2731_MODULE_EN 0xc08 #define SC27XX_MODULE_ADC_EN BIT(5) +#define SC2721_ARM_CLK_EN 0xc0c #define SC2731_ARM_CLK_EN 0xc10 #define SC27XX_CLK_ADC_EN BIT(5) #define SC27XX_CLK_ADC_CLK_EN BIT(6) @@ -37,7 +39,9 @@ /* Bits and mask definition for SC27XX_ADC_CH_CFG register */ #define SC27XX_ADC_CHN_ID_MASK GENMASK(4, 0) #define SC27XX_ADC_SCALE_MASK GENMASK(10, 9) +#define SC2721_ADC_SCALE_MASK BIT(5) #define SC27XX_ADC_SCALE_SHIFT 9 +#define SC2721_ADC_SCALE_SHIFT 5 /* Bits definitions for SC27XX_ADC_INT_EN registers */ #define SC27XX_ADC_IRQ_EN BIT(0) @@ -67,8 +71,21 @@ #define SC27XX_RATIO_NUMERATOR_OFFSET 16 #define SC27XX_RATIO_DENOMINATOR_MASK GENMASK(15, 0) +/* ADC specific channel reference voltage 3.5V */ +#define SC27XX_ADC_REFVOL_VDD35 3500000 + +/* ADC default channel reference voltage is 2.8V */ +#define SC27XX_ADC_REFVOL_VDD28 2800000 + +enum sc27xx_pmic_type { + SC27XX_ADC, + SC2721_ADC, +}; + struct sc27xx_adc_data { + struct iio_dev *indio_dev; struct device *dev; + struct regulator *volref; struct regmap *regmap; /* * One hardware spinlock to synchronize between the multiple @@ -87,6 +104,7 @@ struct sc27xx_adc_data { * in the device data structure. */ struct sc27xx_adc_variant_data { + enum sc27xx_pmic_type pmic_type; u32 module_en; u32 clk_en; u32 scale_shift; @@ -187,6 +205,94 @@ static int sc27xx_adc_scale_calibration(struct sc27xx_adc_data *data, return 0; } +static int sc2720_adc_get_ratio(int channel, int scale) +{ + switch (channel) { + case 14: + switch (scale) { + case 0: + return SC27XX_VOLT_RATIO(68, 900); + case 1: + return SC27XX_VOLT_RATIO(68, 1760); + case 2: + return SC27XX_VOLT_RATIO(68, 2327); + case 3: + return SC27XX_VOLT_RATIO(68, 3654); + default: + return SC27XX_VOLT_RATIO(1, 1); + } + case 16: + switch (scale) { + case 0: + return SC27XX_VOLT_RATIO(48, 100); + case 1: + return SC27XX_VOLT_RATIO(480, 1955); + case 2: + return SC27XX_VOLT_RATIO(480, 2586); + case 3: + return SC27XX_VOLT_RATIO(48, 406); + default: + return SC27XX_VOLT_RATIO(1, 1); + } + case 21: + case 22: + case 23: + switch (scale) { + case 0: + return SC27XX_VOLT_RATIO(3, 8); + case 1: + return SC27XX_VOLT_RATIO(375, 1955); + case 2: + return SC27XX_VOLT_RATIO(375, 2586); + case 3: + return SC27XX_VOLT_RATIO(300, 3248); + default: + return SC27XX_VOLT_RATIO(1, 1); + } + default: + switch (scale) { + case 0: + return SC27XX_VOLT_RATIO(1, 1); + case 1: + return SC27XX_VOLT_RATIO(1000, 1955); + case 2: + return SC27XX_VOLT_RATIO(1000, 2586); + case 3: + return SC27XX_VOLT_RATIO(100, 406); + default: + return SC27XX_VOLT_RATIO(1, 1); + } + } + return SC27XX_VOLT_RATIO(1, 1); +} + +static int sc2721_adc_get_ratio(int channel, int scale) +{ + switch (channel) { + case 1: + case 2: + case 3: + case 4: + return scale ? SC27XX_VOLT_RATIO(400, 1025) : + SC27XX_VOLT_RATIO(1, 1); + case 5: + return SC27XX_VOLT_RATIO(7, 29); + case 7: + case 9: + return scale ? SC27XX_VOLT_RATIO(100, 125) : + SC27XX_VOLT_RATIO(1, 1); + case 14: + return SC27XX_VOLT_RATIO(68, 900); + case 16: + return SC27XX_VOLT_RATIO(48, 100); + case 19: + return SC27XX_VOLT_RATIO(1, 3); + default: + return SC27XX_VOLT_RATIO(1, 1); + } + return SC27XX_VOLT_RATIO(1, 1); +} + static int sc2731_adc_get_ratio(int channel, int scale) { switch (channel) { @@ -215,6 +321,34 @@ static int sc2731_adc_get_ratio(int channel, int scale) /* * According to the datasheet set specific value on some channel. */ +static void sc2720_adc_scale_init(struct sc27xx_adc_data *data) +{ + int i; + + for (i = 0; i < SC27XX_ADC_CHANNEL_MAX; i++) { + switch (i) { + case 5: + data->channel_scale[i] = 3; + break; + case 7: + case 9: + data->channel_scale[i] = 2; + break; + case 13: + data->channel_scale[i] = 1; + break; + case 19: + case 30: + case 31: + data->channel_scale[i] = 3; + break; + default: + data->channel_scale[i] = 0; + break; + } + } +} + static void sc2731_adc_scale_init(struct sc27xx_adc_data *data) { int i; @@ -239,6 +373,24 @@ static int sc27xx_adc_read(struct sc27xx_adc_data *data, int channel, return ret; } + /* + * According to the sc2721 chip data sheet, the reference voltage of + * specific channel 30 and channel 31 in ADC module needs to be set from + * the default 2.8v to 3.5v. + */ + if (data->var_data->pmic_type == SC2721_ADC) { + if ((channel == 30) || (channel == 31)) { + ret = regulator_set_voltage(data->volref, + SC27XX_ADC_REFVOL_VDD35, + SC27XX_ADC_REFVOL_VDD35); + if (ret) { + dev_err(data->dev, "failed to set the volref 3.5V\n"); + hwspin_unlock_raw(data->hwlock); + return ret; + } + } + } + ret = regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL, SC27XX_ADC_EN, SC27XX_ADC_EN); if (ret) @@ -293,6 +445,16 @@ static int sc27xx_adc_read(struct sc27xx_adc_data *data, int channel, regmap_update_bits(data->regmap, data->base + SC27XX_ADC_CTL, SC27XX_ADC_EN, 0); unlock_adc: + if (data->var_data->pmic_type == SC2721_ADC) { + if ((channel == 30) || (channel == 31)) { + ret = regulator_set_voltage(data->volref, + SC27XX_ADC_REFVOL_VDD28, + SC27XX_ADC_REFVOL_VDD28); + if (ret) + dev_err(data->dev, "failed to set the volref 2.8V\n"); + } + } + hwspin_unlock_raw(data->hwlock); if (!ret) @@ -522,6 +684,7 @@ static void sc27xx_adc_disable(void *_data) } static const struct sc27xx_adc_variant_data sc2731_data = { + .pmic_type = SC27XX_ADC, .module_en = SC2731_MODULE_EN, .clk_en = SC2731_ARM_CLK_EN, .scale_shift = SC27XX_ADC_SCALE_SHIFT, @@ -532,6 +695,30 @@ static const struct sc27xx_adc_variant_data sc2731_data = { .get_ratio = sc2731_adc_get_ratio, }; +static const struct sc27xx_adc_variant_data sc2721_data = { + .pmic_type = SC2721_ADC, + .module_en = SC2731_MODULE_EN, + .clk_en = SC2721_ARM_CLK_EN, + .scale_shift = SC2721_ADC_SCALE_SHIFT, + .scale_mask = SC2721_ADC_SCALE_MASK, + .bscale_cal = &sc2731_big_scale_graph_calib, + .sscale_cal = &sc2731_small_scale_graph_calib, + .init_scale = sc2731_adc_scale_init, + .get_ratio = sc2721_adc_get_ratio, +}; + +static const struct sc27xx_adc_variant_data sc2720_data = { + .pmic_type = SC27XX_ADC, + .module_en = SC2731_MODULE_EN, + .clk_en = SC2721_ARM_CLK_EN, + .scale_shift = SC27XX_ADC_SCALE_SHIFT, + .scale_mask = SC27XX_ADC_SCALE_MASK, + .bscale_cal = &big_scale_graph_calib, + .sscale_cal = &small_scale_graph_calib, + .init_scale = sc2720_adc_scale_init, + .get_ratio = sc2720_adc_get_ratio, +}; + static int sc27xx_adc_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -582,6 +769,15 @@ static int sc27xx_adc_probe(struct platform_device *pdev) } sc27xx_data->dev = dev; + if (pdata->pmic_type == SC2721_ADC) { + sc27xx_data->volref = devm_regulator_get_optional(dev, "vref"); + if (IS_ERR_OR_NULL(sc27xx_data->volref)) { + ret = PTR_ERR(sc27xx_data->volref); + dev_err(dev, "err! ADC volref, err: %d\n", ret); + return ret; + } + } + sc27xx_data->var_data = pdata; sc27xx_data->var_data->init_scale(sc27xx_data); @@ -611,6 +807,8 @@ static int sc27xx_adc_probe(struct platform_device *pdev) static const struct of_device_id sc27xx_adc_of_match[] = { { .compatible = "sprd,sc2731-adc", .data = &sc2731_data}, + { .compatible = "sprd,sc2721-adc", .data = &sc2721_data}, + { .compatible = "sprd,sc2720-adc", .data = &sc2720_data}, { } }; MODULE_DEVICE_TABLE(of, sc27xx_adc_of_match);