| Message ID | 20220315173042.1325858-4-gwendal@chromium.org (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add settings for precharge and internal resistor | expand |
Quoting Gwendal Grignou (2022-03-15 10:30:38) > Add ability to set the precharge internal resistance from the device > tree. > > Signed-off-by: Gwendal Grignou <gwendal@chromium.org> > --- > drivers/iio/proximity/sx9324.c | 14 ++++++++++++-- > 1 file changed, 12 insertions(+), 2 deletions(-) > > diff --git a/drivers/iio/proximity/sx9324.c b/drivers/iio/proximity/sx9324.c > index 1bef16437aa84..785af857b23a1 100644 > --- a/drivers/iio/proximity/sx9324.c > +++ b/drivers/iio/proximity/sx9324.c > @@ -70,7 +70,8 @@ > #define SX9324_REG_AFE_PH2 0x2a > #define SX9324_REG_AFE_PH3 0x2b > #define SX9324_REG_AFE_CTRL8 0x2c > -#define SX9324_REG_AFE_CTRL8_RESFILTN_4KOHM 0x02 > +#define SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM 0x02 > +#define SX9324_REG_AFE_CTRL8_RESFILTIN_MASK GENMASK(3, 0) > #define SX9324_REG_AFE_CTRL9 0x2d > #define SX9324_REG_AFE_CTRL9_AGAIN_1 0x08 > > @@ -781,7 +782,7 @@ static const struct sx_common_reg_default sx9324_default_regs[] = { > { SX9324_REG_AFE_PH2, 0x1a }, > { SX9324_REG_AFE_PH3, 0x16 }, > > - { SX9324_REG_AFE_CTRL8, SX9324_REG_AFE_CTRL8_RESFILTN_4KOHM }, > + { SX9324_REG_AFE_CTRL8, 0x10 | SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM }, Is this 0x10 an enable bit? So it wasn't being enabled before? Please make a define for the 0x10 value. > { SX9324_REG_AFE_CTRL9, SX9324_REG_AFE_CTRL9_AGAIN_1 }, > > { SX9324_REG_PROX_CTRL0, SX9324_REG_PROX_CTRL0_GAIN_1 |
diff --git a/drivers/iio/proximity/sx9324.c b/drivers/iio/proximity/sx9324.c index 1bef16437aa84..785af857b23a1 100644 --- a/drivers/iio/proximity/sx9324.c +++ b/drivers/iio/proximity/sx9324.c @@ -70,7 +70,8 @@ #define SX9324_REG_AFE_PH2 0x2a #define SX9324_REG_AFE_PH3 0x2b #define SX9324_REG_AFE_CTRL8 0x2c -#define SX9324_REG_AFE_CTRL8_RESFILTN_4KOHM 0x02 +#define SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM 0x02 +#define SX9324_REG_AFE_CTRL8_RESFILTIN_MASK GENMASK(3, 0) #define SX9324_REG_AFE_CTRL9 0x2d #define SX9324_REG_AFE_CTRL9_AGAIN_1 0x08 @@ -781,7 +782,7 @@ static const struct sx_common_reg_default sx9324_default_regs[] = { { SX9324_REG_AFE_PH2, 0x1a }, { SX9324_REG_AFE_PH3, 0x16 }, - { SX9324_REG_AFE_CTRL8, SX9324_REG_AFE_CTRL8_RESFILTN_4KOHM }, + { SX9324_REG_AFE_CTRL8, 0x10 | SX9324_REG_AFE_CTRL8_RESFILTIN_4KOHM }, { SX9324_REG_AFE_CTRL9, SX9324_REG_AFE_CTRL9_AGAIN_1 }, { SX9324_REG_PROX_CTRL0, SX9324_REG_PROX_CTRL0_GAIN_1 | @@ -891,6 +892,15 @@ sx9324_get_default_reg(struct device *dev, int idx, reg_def->def |= FIELD_PREP(SX9324_REG_AFE_CTRL4_RESOLUTION_MASK, raw); break; + case SX9324_REG_AFE_CTRL8: + ret = device_property_read_u32(dev, + "semtech,input-precharge-resistor", + &raw); + reg_def->def &= ~SX9324_REG_AFE_CTRL8_RESFILTIN_MASK; + reg_def->def |= FIELD_PREP(SX9324_REG_AFE_CTRL8_RESFILTIN_MASK, + raw / 2); + break; + case SX9324_REG_ADV_CTRL5: ret = device_property_read_u32(dev, "semtech,startup-sensor", &start);
Add ability to set the precharge internal resistance from the device tree. Signed-off-by: Gwendal Grignou <gwendal@chromium.org> --- drivers/iio/proximity/sx9324.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-)