| Message ID | 20220503085935.1533814-80-jic23@kernel.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | IIO: Fix alignment of buffers for DMA | expand |
Acked-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> From: Jonathan Cameron <jic23@kernel.org> Sent: Tuesday, May 3, 2022 10:59 To: linux-iio@vger.kernel.org <linux-iio@vger.kernel.org> Cc: Akinobu Mita <akinobu.mita@gmail.com>; Alexandru Lazar <alazar@startmail.com>; Alexandru Tachici <alexandru.tachici@analog.com>; Antoniu Miclaus <antoniu.miclaus@analog.com>; Charles-Antoine Couret <charles-antoine.couret@essensium.com>; Cosmin Tanislav <cosmin.tanislav@analog.com>; Cristian Pop <cristian.pop@analog.com>; David Lechner <david@lechnology.com>; Ivan Mikhaylov <i.mikhaylov@yadro.com>; Jacopo Mondi <jacopo+renesas@jmondi.org>; Jean-Baptiste Maneyrol <jmaneyrol@invensense.com>; Lars-Peter Clausen <lars@metafoo.de>; Marcelo Schmitt <marcelo.schmitt1@gmail.com>; Mårten Lindahl <martenli@axis.com>; Matt Ranostay <mranostay@gmail.com>; Michael Hennerich <michael.hennerich@analog.com>; Michael Welling <mwelling@ieee.org>; Mugilraj Dhavachelvan <dmugil2000@gmail.com>; Navin Sankar Velliangiri <navin@linumiz.com>; Nuno Sá <nuno.sa@analog.com>; Paul Cercueil <paul@crapouillou.net>; Phil Reid <preid@electromag.com.au>; Puranjay Mohan <puranjay12@gmail.com>; Ricardo Ribalda <ribalda@kernel.org>; Robert Jones <rjones@gateworks.com>; Rui Miguel Silva <rui.silva@linaro.org>; Sean Nyekjaer <sean.nyekjaer@prevas.dk>; Tomas Melin <tomas.melin@vaisala.com>; Tomislav Denis <tomislav.denis@avl.com>; Uwe Kleine-König <u.kleine-koenig@pengutronix.de>; Jonathan Cameron <Jonathan.Cameron@huawei.com> Subject: [PATCH 79/92] iio: imu: mpu6050: Fix alignment for DMA safety [CAUTION] This is EXTERNAL email. Do not click any links or open attachments unless you recognize the sender and know the content is safe. ====================================================================== From: Jonathan Cameron <Jonathan.Cameron@huawei.com> ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_ALIGN definition. Fixes: 6b0cc5dce072 ("iio:imu:inv_mpu6050 Fix dma and ts alignment and data leak issues.") Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> --- drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h index c6aa36ee966a..18bd1a50463c 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h @@ -203,7 +203,7 @@ struct inv_mpu6050_state { s32 magn_raw_to_gauss[3]; struct iio_mount_matrix magn_orient; unsigned int suspended_sensors; - u8 data[INV_MPU6050_OUTPUT_DATA_SIZE] ____cacheline_aligned; + u8 data[INV_MPU6050_OUTPUT_DATA_SIZE] __aligned(IIO_ALIGN); }; /*register and associated bit definition*/
diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h index c6aa36ee966a..18bd1a50463c 100644 --- a/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h +++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h @@ -203,7 +203,7 @@ struct inv_mpu6050_state { s32 magn_raw_to_gauss[3]; struct iio_mount_matrix magn_orient; unsigned int suspended_sensors; - u8 data[INV_MPU6050_OUTPUT_DATA_SIZE] ____cacheline_aligned; + u8 data[INV_MPU6050_OUTPUT_DATA_SIZE] __aligned(IIO_ALIGN); }; /*register and associated bit definition*/