| Message ID | 20220511082325.36185-2-biju.das.jz@bp.renesas.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add RZ/G2UL ADC support | expand |
On Wed, May 11, 2022 at 10:23 AM Biju Das <biju.das.jz@bp.renesas.com> wrote: > Document Renesas RZ/G2UL ADC bindings. RZ/G2UL ADC is almost identical > to RZ/G2L, but it has 2 analog input channels compared to 8 channels > on the RZ/G2L. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v3->v4: > * Removed unnecessary SoC specific reg description as it is > equivalent to the logic used in reg. > * Removed Items from reg. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
On 11/05/2022 10:23, Biju Das wrote: > Document Renesas RZ/G2UL ADC bindings. RZ/G2UL ADC is almost identical > to RZ/G2L, but it has 2 analog input channels compared to 8 channels > on the RZ/G2L. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > --- > v3->v4: > * Removed unnecessary SoC specific reg description as it is > equivalent to the logic used in reg. > * Removed Items from reg. > v2->v3: > * Added generic description for reg. > * Improved schema validation by restricting both channel and reg to [0-1]. > v1->v2: > * Started using generic compatible for RZ/G2UL and added SoC specific validation > for channels. > --- > .../bindings/iio/adc/renesas,rzg2l-adc.yaml | 30 ++++++++++++++++--- > 1 file changed, 26 insertions(+), 4 deletions(-) > > diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > index d66c24cae1e1..ae6226c1044e 100644 > --- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > +++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > @@ -19,6 +19,7 @@ properties: > compatible: > items: > - enum: > + - renesas,r9a07g043-adc # RZ/G2UL > - renesas,r9a07g044-adc # RZ/G2L > - renesas,r9a07g054-adc # RZ/V2L > - const: renesas,rzg2l-adc > @@ -76,16 +77,37 @@ patternProperties: > properties: > reg: > description: | > - The channel number. It can have up to 8 channels numbered from 0 to 7. > - items: > - - minimum: 0 > - maximum: 7 > + The channel number. > > required: > - reg > > additionalProperties: false > > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: renesas,r9a07g043-adc > + then: > + patternProperties: > + "^channel@[2-7]$": false > + "^channel@[0-1]$": > + type: object The actual type was defined earlier - in your first "patternProperties" - so this "type:object" should not be needed. > + properties: > + reg: > + minimum: 0 > + maximum: 1 > + else: > + patternProperties: > + "^channel@[0-7]$": > + type: object Ditto. With both removed: Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
Hi Krzysztof Kozlowski, Thanks for the feedback. > Subject: Re: [PATCH v4 1/2] dt-bindings: iio: adc: Document Renesas RZ/G2UL > ADC > > On 11/05/2022 10:23, Biju Das wrote: > > Document Renesas RZ/G2UL ADC bindings. RZ/G2UL ADC is almost identical > > to RZ/G2L, but it has 2 analog input channels compared to 8 channels > > on the RZ/G2L. > > > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> > > --- > > v3->v4: > > * Removed unnecessary SoC specific reg description as it is > > equivalent to the logic used in reg. > > * Removed Items from reg. > > v2->v3: > > * Added generic description for reg. > > * Improved schema validation by restricting both channel and reg to [0- > 1]. > > v1->v2: > > * Started using generic compatible for RZ/G2UL and added SoC specific > validation > > for channels. > > --- > > .../bindings/iio/adc/renesas,rzg2l-adc.yaml | 30 ++++++++++++++++--- > > 1 file changed, 26 insertions(+), 4 deletions(-) > > > > diff --git > > a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > > b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > > index d66c24cae1e1..ae6226c1044e 100644 > > --- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > > +++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml > > @@ -19,6 +19,7 @@ properties: > > compatible: > > items: > > - enum: > > + - renesas,r9a07g043-adc # RZ/G2UL > > - renesas,r9a07g044-adc # RZ/G2L > > - renesas,r9a07g054-adc # RZ/V2L > > - const: renesas,rzg2l-adc > > @@ -76,16 +77,37 @@ patternProperties: > > properties: > > reg: > > description: | > > - The channel number. It can have up to 8 channels numbered from > 0 to 7. > > - items: > > - - minimum: 0 > > - maximum: 7 > > + The channel number. > > > > required: > > - reg > > > > additionalProperties: false > > > > +allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: renesas,r9a07g043-adc > > + then: > > + patternProperties: > > + "^channel@[2-7]$": false > > + "^channel@[0-1]$": > > + type: object > > The actual type was defined earlier - in your first "patternProperties" > - so this "type:object" should not be needed. OK, fixed this one and below one and posted v5. Thanks Biju > > > + properties: > > + reg: > > + minimum: 0 > > + maximum: 1 > > + else: > > + patternProperties: > > + "^channel@[0-7]$": > > + type: object > > Ditto. > > With both removed: > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > > Best regards, > Krzysztof
diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml index d66c24cae1e1..ae6226c1044e 100644 --- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml @@ -19,6 +19,7 @@ properties: compatible: items: - enum: + - renesas,r9a07g043-adc # RZ/G2UL - renesas,r9a07g044-adc # RZ/G2L - renesas,r9a07g054-adc # RZ/V2L - const: renesas,rzg2l-adc @@ -76,16 +77,37 @@ patternProperties: properties: reg: description: | - The channel number. It can have up to 8 channels numbered from 0 to 7. - items: - - minimum: 0 - maximum: 7 + The channel number. required: - reg additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + const: renesas,r9a07g043-adc + then: + patternProperties: + "^channel@[2-7]$": false + "^channel@[0-1]$": + type: object + properties: + reg: + minimum: 0 + maximum: 1 + else: + patternProperties: + "^channel@[0-7]$": + type: object + properties: + reg: + minimum: 0 + maximum: 7 + additionalProperties: false examples:
Document Renesas RZ/G2UL ADC bindings. RZ/G2UL ADC is almost identical to RZ/G2L, but it has 2 analog input channels compared to 8 channels on the RZ/G2L. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> --- v3->v4: * Removed unnecessary SoC specific reg description as it is equivalent to the logic used in reg. * Removed Items from reg. v2->v3: * Added generic description for reg. * Improved schema validation by restricting both channel and reg to [0-1]. v1->v2: * Started using generic compatible for RZ/G2UL and added SoC specific validation for channels. --- .../bindings/iio/adc/renesas,rzg2l-adc.yaml | 30 ++++++++++++++++--- 1 file changed, 26 insertions(+), 4 deletions(-)