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[1/7] arm64: dts: ti: k3-am62-main: Add eQEP nodes

Message ID 20240418221417.1592787-2-jm@ti.com (mailing list archive)
State Handled Elsewhere
Headers show
Series Enable eQEP DT support for Sitara K3 platforms | expand

Commit Message

Judith Mendez April 18, 2024, 10:14 p.m. UTC
Add eQEP DT nodes 0-2 for AM625 SoC.

Since external hardware was needed to test eQEP, the DT nodes
for eQEP were not included in the introductory commit. Now that
eQEP has been validated, add nodes to k3-am62-main.dtsi.

Fixes: f1d17330a5be ("arm64: dts: ti: Introduce base support for AM62x SoC")
Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 30 ++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

Comments

Krzysztof Kozlowski April 19, 2024, 1:56 p.m. UTC | #1
On 19/04/2024 00:14, Judith Mendez wrote:
> Add eQEP DT nodes 0-2 for AM625 SoC.
> 
> Since external hardware was needed to test eQEP, the DT nodes
> for eQEP were not included in the introductory commit. Now that
> eQEP has been validated, add nodes to k3-am62-main.dtsi.
> 
> Fixes: f1d17330a5be ("arm64: dts: ti: Introduce base support for AM62x SoC")
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 30 ++++++++++++++++++++++++
>  1 file changed, 30 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> index e9cffca073efc..0877899b90667 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
> @@ -844,6 +844,36 @@ ecap2: pwm@23120000 {
>  		status = "disabled";
>  	};
>  
> +	eqep0: counter@23200000 {
> +		compatible = "ti,am3352-eqep";

That's k3-am62, not am3352. See writing-bindings (and numerous
presentations telling you how to do it, e.g. from two previous EOSS/ELCE).

Best regards,
Krzysztof
Judith Mendez April 22, 2024, 10:07 p.m. UTC | #2
Hi,

On 4/19/24 8:56 AM, Krzysztof Kozlowski wrote:
> On 19/04/2024 00:14, Judith Mendez wrote:
>> Add eQEP DT nodes 0-2 for AM625 SoC.
>>
>> Since external hardware was needed to test eQEP, the DT nodes
>> for eQEP were not included in the introductory commit. Now that
>> eQEP has been validated, add nodes to k3-am62-main.dtsi.
>>
>> Fixes: f1d17330a5be ("arm64: dts: ti: Introduce base support for AM62x SoC")
>> Signed-off-by: Judith Mendez <jm@ti.com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 30 ++++++++++++++++++++++++
>>   1 file changed, 30 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> index e9cffca073efc..0877899b90667 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
>> @@ -844,6 +844,36 @@ ecap2: pwm@23120000 {
>>   		status = "disabled";
>>   	};
>>   
>> +	eqep0: counter@23200000 {
>> +		compatible = "ti,am3352-eqep";
> 
> That's k3-am62, not am3352. See writing-bindings (and numerous
> presentations telling you how to do it, e.g. from two previous EOSS/ELCE).
> 

Thanks, will fix and send v2.

~ Judith

> Best regards,
> Krzysztof
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index e9cffca073efc..0877899b90667 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -844,6 +844,36 @@  ecap2: pwm@23120000 {
 		status = "disabled";
 	};
 
+	eqep0: counter@23200000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23200000 0x00 0x100>;
+		power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 59 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 116 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep1: counter@23210000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23210000 0x00 0x100>;
+		power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 60 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 117 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
+	eqep2: counter@23220000 {
+		compatible = "ti,am3352-eqep";
+		reg = <0x00 0x23220000 0x00 0x100>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 62 0>;
+		clock-names = "fck";
+		interrupts = <GIC_SPI 118 IRQ_TYPE_EDGE_RISING>;
+		status = "disabled";
+	};
+
 	main_mcan0: can@20701000 {
 		compatible = "bosch,m_can";
 		reg = <0x00 0x20701000 0x00 0x200>,