| Message ID | 20240829-sg2002-adc-v5-3-aacb381e869b@bootlin.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | Add SARADC support on Sophgo CV18XX series | expand |
On Thu, Aug 29, 2024 at 02:31:52PM GMT, Thomas Bonnefille wrote: > Add SARADC node for the Successive Approximation Analog to > Digital Converter used in Sophgo CV1800B SoC. > This patch only adds the active domain controller. > > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> > --- > arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > index 891932ae470f..da1ac59e976f 100644 > --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > @@ -133,6 +133,28 @@ portd: gpio-controller@0 { > }; > }; > > + saradc: adc@30f0000 { > + compatible = "sophgo,cv1800b-saradc"; > + reg = <0x030f0000 0x1000>; > + clocks = <&clk CLK_SARADC>; > + interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "disabled"; > + > + channel@0 { > + reg = <0>; > + }; > + > + channel@1 { > + reg = <1>; > + }; > + > + channel@2 { > + reg = <2>; > + }; I think it may better to move channel definition to board file. > + }; > + > i2c0: i2c@4000000 { > compatible = "snps,designware-i2c"; > reg = <0x04000000 0x10000>; > > -- > 2.46.0 >
On Sat, Aug 31, 2024 at 08:49:22PM +0800, Inochi Amaoto wrote: > On Thu, Aug 29, 2024 at 02:31:52PM GMT, Thomas Bonnefille wrote: > > Add SARADC node for the Successive Approximation Analog to > > Digital Converter used in Sophgo CV1800B SoC. > > This patch only adds the active domain controller. > > > > Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> > > --- > > arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 22 ++++++++++++++++++++++ > > 1 file changed, 22 insertions(+) > > > > diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > > index 891932ae470f..da1ac59e976f 100644 > > --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > > +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi > > @@ -133,6 +133,28 @@ portd: gpio-controller@0 { > > }; > > }; > > > > + saradc: adc@30f0000 { > > + compatible = "sophgo,cv1800b-saradc"; > > + reg = <0x030f0000 0x1000>; > > + clocks = <&clk CLK_SARADC>; > > + interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + status = "disabled"; > > + > > > + channel@0 { > > + reg = <0>; > > + }; > > + > > + channel@1 { > > + reg = <1>; > > + }; > > + > > + channel@2 { > > + reg = <2>; > > + }; > > I think it may better to move channel definition to board file. > It seems OK, let's drop my previous comment. Reviewed-by: Inochi Amaoto <inochiama@gmail.com> > > + }; > > + > > i2c0: i2c@4000000 { > > compatible = "snps,designware-i2c"; > > reg = <0x04000000 0x10000>; > > > > -- > > 2.46.0 > >
diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi index 891932ae470f..da1ac59e976f 100644 --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi @@ -133,6 +133,28 @@ portd: gpio-controller@0 { }; }; + saradc: adc@30f0000 { + compatible = "sophgo,cv1800b-saradc"; + reg = <0x030f0000 0x1000>; + clocks = <&clk CLK_SARADC>; + interrupts = <100 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + channel@0 { + reg = <0>; + }; + + channel@1 { + reg = <1>; + }; + + channel@2 { + reg = <2>; + }; + }; + i2c0: i2c@4000000 { compatible = "snps,designware-i2c"; reg = <0x04000000 0x10000>;
Add SARADC node for the Successive Approximation Analog to Digital Converter used in Sophgo CV1800B SoC. This patch only adds the active domain controller. Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com> --- arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)