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[2003:f6:5f0c:3200:f401:bf2b:6011:cd64]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4318b56fbd1sm145916995e9.32.2024.10.28.09.08.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 09:08:14 -0700 (PDT) From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Conor Dooley , David Lechner , Dumitru Ceclan , Jonathan Cameron , Krzysztof Kozlowski , Lars-Peter Clausen , Michael Hennerich , Nuno Sa , Rob Herring Cc: devicetree@vger.kernel.org, linux-iio@vger.kernel.org Subject: [PATCH v2 2/4] dt-bindings: iio: adc: adi,ad7124: Allow specifications of a gpio for irq line Date: Mon, 28 Oct 2024 17:07:51 +0100 Message-ID: <20241028160748.489596-8-u.kleine-koenig@baylibre.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241028160748.489596-6-u.kleine-koenig@baylibre.com> References: <20241028160748.489596-6-u.kleine-koenig@baylibre.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1978; i=u.kleine-koenig@baylibre.com; h=from:subject; bh=hgMcpwy9TdCE65oxriQ+FPntRPBuJVE0q16nRMzx8DQ=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBnH7baQ6qc7828IvvEh96kIK411T6paMu9Ri9yR mQa+RhO2NaJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZx+22gAKCRCPgPtYfRL+ TozKB/9uLGZE0013XxnTuJbXRpJQVsaREztrAksqC/Qv5AeoQvUiHcaym7p96rY46NO/J4aOaj3 HbAzyCBoyMxKelyJJKTUoWZsEccKfJA7TCbZUuw9YWn7s5rxakpsZmt3kMC6jGHfYR8VDpZS/8l o0wga7yZX9QWJCiahabzLsKa6LBbcnN9p2eV602Cf6KEcmodQ4iYJot2+Tvgv2AUBWglRko9H3f ODqYAHu03qF/+XiavPAgVY2Bs6t5bqYgX79HqNayZ6zj6GrHrt60QMFXh/N3nqa9rWlZKZUlygz PUKjzMFNIUF9ZUyWWCze6AwtAAtLp+rJbrBTJlRlq3WFg+Bi X-Developer-Key: i=u.kleine-koenig@baylibre.com; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 For the AD7124 chip the logical irq line (̅R̅D̅Y) is physically on the same pin as the spi MISO output (DOUT) and so reading a register might trigger an interrupt. For correct operation it's critical that the actual state of the pin can be read to judge if an interrupt event is a real one or just a spurious one triggered by toggling the line in its MISO mode. Allow specification of an "rdy-gpios" property that references a GPIO that can be used for that purpose. While this is typically the same GPIO also used (implicitly) as interrupt source, it is still supposed that the interrupt is specified as before and usual. Signed-off-by: Uwe Kleine-König Reviewed-by: Rob Hering (Arm) --- Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index de49b571bd57..71a40c7ca4bf 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -37,6 +37,12 @@ properties: description: IRQ line for the ADC maxItems: 1 + rdy-gpios: + description: | + GPIO reading the ̅R̅D̅Y line. Useful to reliably detect the interrupt + condition. + maxItems: 1 + '#address-cells': const: 1 @@ -112,6 +118,7 @@ unevaluatedProperties: false examples: - | #include + #include spi { #address-cells = <1>; #size-cells = <0>; @@ -122,6 +129,7 @@ examples: spi-max-frequency = <5000000>; interrupts = <25 IRQ_TYPE_EDGE_FALLING>; interrupt-parent = <&gpio>; + rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>; refin1-supply = <&adc_vref>; clocks = <&ad7124_mclk>; clock-names = "mclk";