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([82.78.167.161]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-385e0117069sm11794315f8f.60.2024.12.03.03.13.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Dec 2024 03:13:47 -0800 (PST) From: Claudiu X-Google-Original-From: Claudiu To: prabhakar.mahadev-lad.rj@bp.renesas.com, jic23@kernel.org, lars@metafoo.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de Cc: claudiu.beznea@tuxon.dev, linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: [PATCH 10/14] iio: adc: rzg2l_adc: Add suspend/resume support Date: Tue, 3 Dec 2024 13:13:10 +0200 Message-Id: <20241203111314.2420473-11-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241203111314.2420473-1-claudiu.beznea.uj@bp.renesas.com> References: <20241203111314.2420473-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Claudiu Beznea The Renesas RZ/G3S SoC features a power-saving mode where power to most of the SoC components is turned off, including the ADC IP. Suspend/resume support has been added to the rzg2l_adc driver to restore functionality after resuming from this power-saving mode. During suspend, the ADC resets are asserted, and the ADC is powered down. On resume, the ADC resets are de-asserted, the hardware is re-initialized, and the ADC power is restored using the runtime PM APIs. Signed-off-by: Claudiu Beznea --- drivers/iio/adc/rzg2l_adc.c | 70 +++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) diff --git a/drivers/iio/adc/rzg2l_adc.c b/drivers/iio/adc/rzg2l_adc.c index f938b0f9a795..634073e7241f 100644 --- a/drivers/iio/adc/rzg2l_adc.c +++ b/drivers/iio/adc/rzg2l_adc.c @@ -86,6 +86,7 @@ struct rzg2l_adc { u16 *last_val; struct completion completion; struct mutex lock; + bool was_rpm_active; }; /** @@ -550,8 +551,77 @@ static int rzg2l_adc_pm_runtime_resume(struct device *dev) return 0; } +static int rzg2l_adc_suspend(struct device *dev) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct rzg2l_adc *adc = iio_priv(indio_dev); + struct reset_control_bulk_data resets[] = { + { .rstc = adc->presetn }, + { .rstc = adc->adrstn }, + }; + int ret; + + if (pm_runtime_suspended(dev)) { + adc->was_rpm_active = false; + } else { + ret = pm_runtime_force_suspend(dev); + if (ret) + return ret; + adc->was_rpm_active = true; + } + + ret = reset_control_bulk_assert(ARRAY_SIZE(resets), resets); + if (ret) + goto rpm_restore; + + return 0; + +rpm_restore: + if (adc->was_rpm_active) + pm_runtime_force_resume(dev); + + return ret; +} + +static int rzg2l_adc_resume(struct device *dev) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct rzg2l_adc *adc = iio_priv(indio_dev); + struct reset_control_bulk_data resets[] = { + { .rstc = adc->adrstn }, + { .rstc = adc->presetn }, + }; + int ret; + + ret = reset_control_bulk_deassert(ARRAY_SIZE(resets), resets); + if (ret) + return ret; + + if (adc->was_rpm_active) { + ret = pm_runtime_force_resume(dev); + if (ret) + goto resets_restore; + } + + ret = rzg2l_adc_hw_init(dev, adc); + if (ret) + goto rpm_restore; + + return 0; + +rpm_restore: + if (adc->was_rpm_active) { + pm_runtime_mark_last_busy(dev); + pm_runtime_put_autosuspend(dev); + } +resets_restore: + reset_control_bulk_assert(ARRAY_SIZE(resets), resets); + return ret; +} + static const struct dev_pm_ops rzg2l_adc_pm_ops = { RUNTIME_PM_OPS(rzg2l_adc_pm_runtime_suspend, rzg2l_adc_pm_runtime_resume, NULL) + SYSTEM_SLEEP_PM_OPS(rzg2l_adc_suspend, rzg2l_adc_resume) }; static struct platform_driver rzg2l_adc_driver = {