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[95.245.235.245]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a17d7a7sm17107364f8f.32.2025.01.29.03.05.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Jan 2025 03:05:18 -0800 (PST) From: Angelo Dureghello X-Google-Original-From: Angelo Dureghello Date: Wed, 29 Jan 2025 12:03:10 +0100 Subject: [PATCH v3 09/10] iio: adc: ad7606: change channel macros parameters Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20250129-wip-bl-ad7606_add_backend_sw_mode-v3-9-c3aec77c0ab7@baylibre.com> References: <20250129-wip-bl-ad7606_add_backend_sw_mode-v3-0-c3aec77c0ab7@baylibre.com> In-Reply-To: <20250129-wip-bl-ad7606_add_backend_sw_mode-v3-0-c3aec77c0ab7@baylibre.com> To: Michael Hennerich , Lars-Peter Clausen , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandru Ardelean , David Lechner Cc: Jonathan Cameron , linux-fbdev@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Guillaume Stols , Angelo Dureghello X-Mailer: b4 0.14.1 From: Guillaume Stols Add the possibility to pass the *_available parameters to the main macro. This is a preparation to add the new channels for software mode and hardware mode in iio backend mode more easily. Signed-off-by: Guillaume Stols --- drivers/iio/adc/ad7606.h | 51 ++++++++++++++++++++++++------------------------ 1 file changed, 25 insertions(+), 26 deletions(-) diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index eca7ea99e24d..ada8065fba4e 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -40,37 +40,19 @@ #define AD7606_RANGE_CH_ADDR(ch) (0x03 + ((ch) >> 1)) #define AD7606_OS_MODE 0x08 -#define AD760X_CHANNEL(num, mask_sep, mask_type, mask_all, bits) { \ +#define AD760X_CHANNEL(num, mask_sep, mask_type, mask_all, \ + mask_sep_avail, mask_all_avail, bits) { \ .type = IIO_VOLTAGE, \ .indexed = 1, \ .channel = num, \ .address = num, \ .info_mask_separate = mask_sep, \ + .info_mask_separate_available = \ + mask_sep_avail, \ .info_mask_shared_by_type = mask_type, \ .info_mask_shared_by_all = mask_all, \ - .scan_index = num, \ - .scan_type = { \ - .sign = 's', \ - .realbits = (bits), \ - .storagebits = (bits) > 16 ? 32 : 16, \ - .endianness = IIO_CPU, \ - }, \ -} - -#define AD7606_SW_CHANNEL(num, bits) { \ - .type = IIO_VOLTAGE, \ - .indexed = 1, \ - .channel = num, \ - .address = num, \ - .info_mask_separate = \ - BIT(IIO_CHAN_INFO_RAW) | \ - BIT(IIO_CHAN_INFO_SCALE), \ - .info_mask_separate_available = \ - BIT(IIO_CHAN_INFO_SCALE), \ - .info_mask_shared_by_all = \ - BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ .info_mask_shared_by_all_available = \ - BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + mask_all_avail, \ .scan_index = num, \ .scan_type = { \ .sign = 's', \ @@ -80,14 +62,30 @@ }, \ } +#define AD7606_SW_CHANNEL(num, bits) \ + AD760X_CHANNEL(num, \ + /* mask separate */ \ + BIT(IIO_CHAN_INFO_RAW) | \ + BIT(IIO_CHAN_INFO_SCALE), \ + /* mask type */ \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + /* mask all */ \ + 0, \ + /* mask separate available */ \ + BIT(IIO_CHAN_INFO_SCALE), \ + /* mask all available */ \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + bits) + #define AD7605_CHANNEL(num) \ AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \ - BIT(IIO_CHAN_INFO_SCALE), 0, 16) + BIT(IIO_CHAN_INFO_SCALE), 0, 0, 0, 16) #define AD7606_CHANNEL(num, bits) \ AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \ BIT(IIO_CHAN_INFO_SCALE), \ - BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), bits) + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + 0, 0, bits) #define AD7616_CHANNEL(num) AD7606_SW_CHANNEL(num, 16) @@ -95,7 +93,8 @@ AD760X_CHANNEL(num, 0, \ BIT(IIO_CHAN_INFO_SCALE), \ BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ - BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), 16) + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + 0, 0, 16) struct ad7606_state;