| Message ID | 20250224180150.3689638-2-fabrice.gasnier@foss.st.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add STM32MP25 LPTIM support: MFD, PWM, IIO, counter, clocksource | expand |
On Mon, Feb 24, 2025 at 07:01:43PM +0100, Fabrice Gasnier wrote: > pwm: > type: object > additionalProperties: false > > properties: > compatible: > - const: st,stm32-pwm-lp > + enum: > + - st,stm32-pwm-lp > + - st,stm32mp25-pwm-lp > > "#pwm-cells": > const: 3 > @@ -69,7 +76,9 @@ properties: > > properties: > compatible: > - const: st,stm32-lptimer-counter > + enum: > + - st,stm32-lptimer-counter > + - st,stm32mp25-lptimer-counter Driver changes suggest many of these are compatible. Why isn't this expressed? Best regards, Krzysztof
On 2/25/25 13:02, Krzysztof Kozlowski wrote: > On Mon, Feb 24, 2025 at 07:01:43PM +0100, Fabrice Gasnier wrote: >> pwm: >> type: object >> additionalProperties: false >> >> properties: >> compatible: >> - const: st,stm32-pwm-lp >> + enum: >> + - st,stm32-pwm-lp >> + - st,stm32mp25-pwm-lp >> >> "#pwm-cells": >> const: 3 >> @@ -69,7 +76,9 @@ properties: >> >> properties: >> compatible: >> - const: st,stm32-lptimer-counter >> + enum: >> + - st,stm32-lptimer-counter >> + - st,stm32mp25-lptimer-counter > > Driver changes suggest many of these are compatible. Why isn't this expressed? Hi Krzysztof, The Low Power Timer (LPTIM) hardware isn't fully backward compatible. At driver level, as indicated in the cover-letter, same feature list as on STM32MP1x is supported currently. This is probably what makes it look like it's compatible, but it's not fully compatible. The hardware controller is a bit different. Some registers/bits has been revisited among other things. This is the purpose for these new compatibles. Please find driver-related answers each driver part. Best regards, Fabrice > > Best regards, > Krzysztof >
On 25/02/2025 15:57, Fabrice Gasnier wrote: > On 2/25/25 13:02, Krzysztof Kozlowski wrote: >> On Mon, Feb 24, 2025 at 07:01:43PM +0100, Fabrice Gasnier wrote: >>> pwm: >>> type: object >>> additionalProperties: false >>> >>> properties: >>> compatible: >>> - const: st,stm32-pwm-lp >>> + enum: >>> + - st,stm32-pwm-lp >>> + - st,stm32mp25-pwm-lp >>> >>> "#pwm-cells": >>> const: 3 >>> @@ -69,7 +76,9 @@ properties: >>> >>> properties: >>> compatible: >>> - const: st,stm32-lptimer-counter >>> + enum: >>> + - st,stm32-lptimer-counter >>> + - st,stm32mp25-lptimer-counter >> >> Driver changes suggest many of these are compatible. Why isn't this expressed? > > Hi Krzysztof, > > The Low Power Timer (LPTIM) hardware isn't fully backward compatible. > > At driver level, as indicated in the cover-letter, same feature list as > on STM32MP1x is supported currently. This is probably what makes it look > like it's compatible, but it's not fully compatible. I don't understand. Same feature list is supported means fully compatible, but you say not fully compatible. You are aware that compatible means not the same? > > The hardware controller is a bit different. Some registers/bits has been > revisited among other things. This is the purpose for these new compatibles. We do not discuss new compatibles. We discuss lack of compatibility. If registers/bits are changed, how existing driver can work with same ID table? Best regards, Krzysztof
On 2/26/25 08:51, Krzysztof Kozlowski wrote: > On 25/02/2025 15:57, Fabrice Gasnier wrote: >> On 2/25/25 13:02, Krzysztof Kozlowski wrote: >>> On Mon, Feb 24, 2025 at 07:01:43PM +0100, Fabrice Gasnier wrote: >>>> pwm: >>>> type: object >>>> additionalProperties: false >>>> >>>> properties: >>>> compatible: >>>> - const: st,stm32-pwm-lp >>>> + enum: >>>> + - st,stm32-pwm-lp >>>> + - st,stm32mp25-pwm-lp >>>> >>>> "#pwm-cells": >>>> const: 3 >>>> @@ -69,7 +76,9 @@ properties: >>>> >>>> properties: >>>> compatible: >>>> - const: st,stm32-lptimer-counter >>>> + enum: >>>> + - st,stm32-lptimer-counter >>>> + - st,stm32mp25-lptimer-counter >>> >>> Driver changes suggest many of these are compatible. Why isn't this expressed? >> >> Hi Krzysztof, >> >> The Low Power Timer (LPTIM) hardware isn't fully backward compatible. >> >> At driver level, as indicated in the cover-letter, same feature list as >> on STM32MP1x is supported currently. This is probably what makes it look >> like it's compatible, but it's not fully compatible. > > I don't understand. Same feature list is supported means fully > compatible, but you say not fully compatible. You are aware that > compatible means not the same? > >> >> The hardware controller is a bit different. Some registers/bits has been >> revisited among other things. This is the purpose for these new compatibles. > > We do not discuss new compatibles. We discuss lack of compatibility. If > registers/bits are changed, how existing driver can work with same ID table? Hi Krzysztof, To summarize on dt-bindings side, here is my view, following your comments on per driver basis of the compatible usage. Let's keep these new compatibles: - "st,stm32mp25-lptimer-trigger" - "st,stm32mp25-lptimer-counter" Both reflect not only LPTimer hardware update, but also specific interconnect to other hardware blocks throughout all the STM32MP25 SoC. Other compatible strings may be dropped. Reading the revision/identification register of the LPTimer should be enough for compatibility in the related drivers. I'll update this in next revision of the series. Thanks for reviewing, Best Regards, Fabrice > > > > Best regards, > Krzysztof
diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml index d41308856408..4822ce5d0c76 100644 --- a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml @@ -21,7 +21,9 @@ maintainers: properties: compatible: - const: st,stm32-lptimer + enum: + - st,stm32-lptimer + - st,stm32mp25-lptimer reg: maxItems: 1 @@ -48,13 +50,18 @@ properties: minItems: 1 maxItems: 2 + power-domains: + maxItems: 1 + pwm: type: object additionalProperties: false properties: compatible: - const: st,stm32-pwm-lp + enum: + - st,stm32-pwm-lp + - st,stm32mp25-pwm-lp "#pwm-cells": const: 3 @@ -69,7 +76,9 @@ properties: properties: compatible: - const: st,stm32-lptimer-counter + enum: + - st,stm32-lptimer-counter + - st,stm32mp25-lptimer-counter required: - compatible @@ -80,7 +89,9 @@ properties: properties: compatible: - const: st,stm32-lptimer-timer + enum: + - st,stm32-lptimer-timer + - st,stm32mp25-lptimer-timer required: - compatible @@ -92,7 +103,9 @@ patternProperties: properties: compatible: - const: st,stm32-lptimer-trigger + enum: + - st,stm32-lptimer-trigger + - st,stm32mp25-lptimer-trigger reg: description: Identify trigger hardware block.
Add a new stm32mp25 compatible to stm32-lptimer dt-bindings, to support STM32MP25 SoC. Some features has been added to the low-power timer like new capture compare channels (hence more PWM channels, and PWM input capture). Some registers/bits has been revisited to support this. So introduce a new compatible to handle this diversity. Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> --- .../bindings/mfd/st,stm32-lptimer.yaml | 23 +++++++++++++++---- 1 file changed, 18 insertions(+), 5 deletions(-)