From patchwork Fri Dec 8 17:41:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Stefan_Br=C3=BCns?= X-Patchwork-Id: 10103099 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4F85960329 for ; Fri, 8 Dec 2017 17:44:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3606A28E42 for ; Fri, 8 Dec 2017 17:44:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B07528E50; Fri, 8 Dec 2017 17:44:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CD72128E42 for ; Fri, 8 Dec 2017 17:44:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753812AbdLHRol (ORCPT ); Fri, 8 Dec 2017 12:44:41 -0500 Received: from mail-out-2.itc.rwth-aachen.de ([134.130.5.47]:42278 "EHLO mail-out-2.itc.rwth-aachen.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752911AbdLHRmM (ORCPT ); Fri, 8 Dec 2017 12:42:12 -0500 X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: =?us-ascii?q?A2CMBQDbzSpa/54agoZcHAEBAQQBAQoBA?= =?us-ascii?q?YM+ggEHg3uZIYFXl0aCAQqFOwKEX0MUAQEBAQEBAQEBayiFIwYjBAsBRhAlAiY?= =?us-ascii?q?CAlcGDgWKKASoLoFtOohJghoBAQEBAQUBAQEBASMJAYEFgkyCC4NoC4d/Y4JJg?= =?us-ascii?q?mMFikWYQ4EQliaJdCmHLpYvAgICAgkCGoE7NiKBT3CCd4JSHBmBT3eJIQGBFAE?= =?us-ascii?q?BAQ?= X-IPAS-Result: =?us-ascii?q?A2CMBQDbzSpa/54agoZcHAEBAQQBAQoBAYM+ggEHg3uZIYF?= =?us-ascii?q?Xl0aCAQqFOwKEX0MUAQEBAQEBAQEBayiFIwYjBAsBRhAlAiYCAlcGDgWKKASoL?= =?us-ascii?q?oFtOohJghoBAQEBAQUBAQEBASMJAYEFgkyCC4NoC4d/Y4JJgmMFikWYQ4EQlia?= =?us-ascii?q?JdCmHLpYvAgICAgkCGoE7NiKBT3CCd4JSHBmBT3eJIQGBFAEBAQ?= X-IronPort-AV: E=Sophos;i="5.45,378,1508796000"; d="scan'208";a="28277014" Received: from rwthex-w2-a.rwth-ad.de ([134.130.26.158]) by mail-in-2.itc.rwth-aachen.de with ESMTP; 08 Dec 2017 18:42:06 +0100 Received: from pebbles.fritz.box (78.48.176.14) by rwthex-w2-a.rwth-ad.de (2002:8682:1a9e::8682:1a9e) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1034.26; Fri, 8 Dec 2017 18:42:05 +0100 From: =?UTF-8?q?Stefan=20Br=C3=BCns?= To: CC: Peter Meerwald-Stadler , =?UTF-8?q?Stefan=20Br=C3=BCns?= , Maciej Purski , , "Andrew F . Davis" , Lars-Peter Clausen , Jonathan Cameron , Hartmut Knaack , "Javier Martinez Canillas" Subject: [PATCH v1 7/7] iio: adc: ina2xx: Actually align the loop with the conversion ready flag Date: Fri, 8 Dec 2017 18:41:52 +0100 X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171208174152.30341-1-stefan.bruens@rwth-aachen.de> References: <20171208174152.30341-1-stefan.bruens@rwth-aachen.de> MIME-Version: 1.0 X-Originating-IP: [78.48.176.14] X-ClientProxiedBy: rwthex-w3-a.rwth-ad.de (2002:8682:1aa2::8682:1aa2) To rwthex-w2-a.rwth-ad.de (2002:8682:1a9e::8682:1a9e) Message-ID: <5b1a438b-4ea9-4905-b5af-abc383ebdf93@rwthex-w2-a.rwth-ad.de> Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently, the logic just shifts the interval duration between the delay and the polling, but never aligns to the conversion ready flag. Whenever the conversion is already finished, schedule the next read on the regular interval, otherwise schedule it one interval after the flag bit has been set. Split the work function in two functions, one for the status poll and one for reading the values, to be able to note down the time when the flag bit is raised. Signed-off-by: Stefan BrĂ¼ns --- drivers/iio/adc/ina2xx-adc.c | 57 +++++++++++++++++++++++++++++--------------- 1 file changed, 38 insertions(+), 19 deletions(-) diff --git a/drivers/iio/adc/ina2xx-adc.c b/drivers/iio/adc/ina2xx-adc.c index 0a6745e15a5d..728cc109a61c 100644 --- a/drivers/iio/adc/ina2xx-adc.c +++ b/drivers/iio/adc/ina2xx-adc.c @@ -697,13 +697,10 @@ static const struct iio_chan_spec ina219_channels[] = { IIO_CHAN_SOFT_TIMESTAMP(4), }; -static int ina2xx_work_buffer(struct iio_dev *indio_dev) +static int ina2xx_conversion_ready(struct iio_dev *indio_dev) { struct ina2xx_chip_info *chip = iio_priv(indio_dev); - /* data buffer needs space for channel data and timestap */ - unsigned short data[4 + sizeof(s64)/sizeof(short)]; - int bit, ret, i = 0; - s64 time; + int ret; unsigned int alert; /* @@ -717,22 +714,29 @@ static int ina2xx_work_buffer(struct iio_dev *indio_dev) * For now, we do an extra read of the MASK_ENABLE register (INA226) * resp. the BUS_VOLTAGE register (INA219). */ - if (!chip->allow_async_readout) - do { - if (chip->config->chip_id == ina226) { - ret = regmap_read(chip->regmap, - INA226_MASK_ENABLE, &alert); - alert &= INA226_CVRF; - } else { - ret = regmap_read(chip->regmap, - INA2XX_BUS_VOLTAGE, &alert); - alert &= INA219_CNVR; - } + if (chip->config->chip_id == ina226) { + ret = regmap_read(chip->regmap, + INA226_MASK_ENABLE, &alert); + alert &= INA226_CVRF; + } else { + ret = regmap_read(chip->regmap, + INA2XX_BUS_VOLTAGE, &alert); + alert &= INA219_CNVR; + } - if (ret < 0) - return ret; + if (ret < 0) + return ret; - } while (!alert); + return !!alert; +} + +static int ina2xx_work_buffer(struct iio_dev *indio_dev) +{ + struct ina2xx_chip_info *chip = iio_priv(indio_dev); + /* data buffer needs space for channel data and timestap */ + unsigned short data[4 + sizeof(s64)/sizeof(short)]; + int bit, ret, i = 0; + s64 time; time = iio_get_time_ns(indio_dev); @@ -776,6 +780,21 @@ static int ina2xx_capture_thread(void *data) ktime_get_ts64(&next); do { + while (!chip->allow_async_readout) { + ret = ina2xx_conversion_ready(indio_dev); + if (ret < 0) + return ret; + + /* + * If the conversion was not yet finished, + * reset the reference timestamp. + */ + if (ret == 0) + ktime_get_ts64(&next); + else + break; + } + ret = ina2xx_work_buffer(indio_dev); if (ret < 0) return ret;