From patchwork Mon Mar 12 20:49:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 10277445 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BB68560211 for ; Mon, 12 Mar 2018 20:49:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ACAC928C22 for ; Mon, 12 Mar 2018 20:49:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9FC8028E55; Mon, 12 Mar 2018 20:49:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3D83728C22 for ; Mon, 12 Mar 2018 20:49:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932330AbeCLUty (ORCPT ); Mon, 12 Mar 2018 16:49:54 -0400 Received: from mail-yw0-f194.google.com ([209.85.161.194]:40901 "EHLO mail-yw0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932247AbeCLUtx (ORCPT ); Mon, 12 Mar 2018 16:49:53 -0400 Received: by mail-yw0-f194.google.com with SMTP id y186so6393093ywf.7; Mon, 12 Mar 2018 13:49:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NfS+jMjSTe60ZXly15zdbshzvtQKQWIKopVzIFheHzg=; b=D0lW6mHQjqbpWwr6n91I5W5l1rMY7fGVgVOrR8z/ylJcmFrVBcp/2TfxH2bpmJ430Q u5RZPEq2qneWCRZ+dpvL73FwqXJ1/jTm+wNgonibIvgqdHe3lxVThIlL+7uMSAFLHYTY s1CKrwd2uQ89gqoVv6F1CGt7qP+YMcVHBSK8SunhuVH3mt+uS/oPAN7Pke0fKQ3Y6Ps9 6Ms0wchLS3wRRITaKFDKY4U1Hg4A1Os3QiG2TQgDVl84CktJUpRYdo3YH4aIw94qARXy TdR3BqwnRzNmQQLBv/2PgQombi8OhrgYnMrRrceZQEPH6JrdvsN+geoA9m+n7YrrxVVO 6hEg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NfS+jMjSTe60ZXly15zdbshzvtQKQWIKopVzIFheHzg=; b=CY6LDbiCU4xhGWnffyL1iDPkKu3K6oVN1kHtLWzy138+WXPIpkk9euq3CzBzm824Gn p0aRAaVJDu1OrwJWhwhQUY96w1uORAR+g6dVR6vIpjX4E/q/ftCvpfzlbwWebEUX1b4Q TZBg0Hiyymx4nNZ+vKOyPE6DKjLZcT7tR4QSpoxW3QZW5uvebTXABE3DsAOf5tsQ33Uv gY4+CA5o9WNDnMKijpiCmIoUUBhguR5KuJmxE3mL21yy8uTQgRcuRplbWK3x3e7dNQD9 q2r4Q4XdpbmZNbUpvYdGwKp79WomnqLIgww9iCDwB0cJlWnSG5Tt9v48h1gg0hoc7iCn EjSw== X-Gm-Message-State: AElRT7HDNhgEp4fzWlI6QbrpQK/HjXxtzMPJMSVcJ3WL4UIBss/LaJRl gTKnTqv4TGVHvW/gejC6BhkjNQ== X-Google-Smtp-Source: AG47ELuYKkH72MRV7JkGWUa3t7w87w5H7bCgaCIfjJVfraq6BxH87lG6uZyX3+DsVrtvvoT8o8Vs4Q== X-Received: by 10.129.159.195 with SMTP id w186mr1939238ywg.414.1520887792503; Mon, 12 Mar 2018 13:49:52 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id g9sm3192544ywb.69.2018.03.12.13.49.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Mar 2018 13:49:52 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, William Breathitt Gray Subject: [PATCH 5/8] gpio: 104-dio-48e: Implement get_multiple callback Date: Mon, 12 Mar 2018 16:49:46 -0400 Message-Id: <5b8ac88568320f8a1b00f3ade7da51b1f3e1cdb3.1520886945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: References: Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ACCES I/O 104-DIO-48E series of devices contain two Programmable Peripheral Interface (PPI) chips of type 82C55, which each feature three 8-bit ports of I/O. Since eight input lines are acquired on a single port input read, the 104-DIO-48E GPIO driver may improve multiple input reads by utilizing a get_multiple callback. This patch implements the dio48e_gpio_get_multiple function which serves as the respective get_multiple callback. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-104-dio-48e.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c index bab3b94c5cbc..35ae2357d2ba 100644 --- a/drivers/gpio/gpio-104-dio-48e.c +++ b/drivers/gpio/gpio-104-dio-48e.c @@ -182,6 +182,46 @@ static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset) return !!(port_state & mask); } +static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, + unsigned long *bits) +{ + struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); + unsigned int i; + const unsigned int gpio_reg_size = 8; + unsigned int bit_word_offset; + unsigned int bits_mask; + const unsigned long reg_mask = GENMASK(gpio_reg_size, 0); + unsigned int port; + unsigned int in_port; + unsigned long port_state; + + /* clear bits array to a clean slate */ + for (i = 0; i < chip->ngpio; i += BITS_PER_LONG) + bits[i / BITS_PER_LONG] = 0; + + /* get bits are evaluated a gpio register size at a time */ + for (i = 0; i < chip->ngpio; i += gpio_reg_size) { + bit_word_offset = i % BITS_PER_LONG; + bits_mask = mask[BIT_WORD(i)] & (reg_mask << bit_word_offset); + if (!bits_mask) { + /* no get bits in this register so skip to next one */ + continue; + } + + /* compute input port offset */ + port = i / gpio_reg_size; + in_port = (port > 2) ? port + 1 : port; + + /* get input bits */ + port_state = inb(dio48egpio->base + in_port); + + /* store acquired bits */ + bits[BIT_WORD(i)] |= port_state << bit_word_offset; + } + + return 0; +} + static void dio48e_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); @@ -384,6 +424,7 @@ static int dio48e_probe(struct device *dev, unsigned int id) dio48egpio->chip.direction_input = dio48e_gpio_direction_input; dio48egpio->chip.direction_output = dio48e_gpio_direction_output; dio48egpio->chip.get = dio48e_gpio_get; + dio48egpio->chip.get_multiple = dio48e_gpio_get_multiple; dio48egpio->chip.set = dio48e_gpio_set; dio48egpio->chip.set_multiple = dio48e_gpio_set_multiple; dio48egpio->base = base[id];