From patchwork Mon Mar 12 20:49:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 10277441 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A7620602BD for ; Mon, 12 Mar 2018 20:49:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9AA4128C22 for ; Mon, 12 Mar 2018 20:49:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8F38328E55; Mon, 12 Mar 2018 20:49:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 26E4428C22 for ; Mon, 12 Mar 2018 20:49:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932450AbeCLUtg (ORCPT ); Mon, 12 Mar 2018 16:49:36 -0400 Received: from mail-yw0-f195.google.com ([209.85.161.195]:43494 "EHLO mail-yw0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932274AbeCLUtf (ORCPT ); Mon, 12 Mar 2018 16:49:35 -0400 Received: by mail-yw0-f195.google.com with SMTP id r66so1926419ywh.10; Mon, 12 Mar 2018 13:49:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BuC7Dbfae7lBC/DvrwfsTN1TjrzAuZ5G3YhmPUvEVAU=; b=uEhpMB+D1F7XIxXJ8MBFllRtoFcB7OINndN0ORvV/SrwDIRtFpCHKeM6KEYtj50obU pPG2gf+9zAK4OXPpae9zf9O37OfvzZKpU0Mk8mHdOd58Dx090jFQYvomjFC+YmqD/kYH Cs05nzJ3D8N+vQguz0SaJTvz3WmVXQ4xJb3Mwrhf+2wFzx8LHjeQswiBwFFzXcrlOAsV 8DIWXGnwKT6reOv7onlR7aSfAvmfYybemS/bIGFLl6NwlOcwouEWUnCXdZFsSTLelnpy /dFYfZV0j7w/sNApr3i2H8bK2uC8m/ss7+nQMhOi3qQoZML2h3WE/BrU0W/uXDXe2Usd 9Vbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=BuC7Dbfae7lBC/DvrwfsTN1TjrzAuZ5G3YhmPUvEVAU=; b=BWin18SdVvSsbDxHaCeiqfSKgiE88D7cBBBXJVRNkYuwl/iRquarmNzva1py2hhyVq EmdGqBUXxfFQ53p3Jp+8RoKSMSfV+8hvGlkWLWP9mUrnHdiGstOhJ8v3XUcPYiT8vSJS HyC6ANV1XfuGTKmXU3tEp62GNlo73vTadWEE01THP6cRnIBtnLVsR8Jv2DpIBtXlq0qO TGc7Z45+DJzS9GcsOnelAe6/NjvErLOP9xYl7Oqdn95rTUhdOE3NnS9JCydFvjaRcyR4 veHpphhCGMiKb6YRvnnmLxYqpR3cxgCrlR7MWdSH8tv0nZJs9WalcCl+Kh8K8aAJter8 NqrQ== X-Gm-Message-State: AElRT7FsCXAhtfoOZAVtwF2WIT3f16fATWfQgnkEjfv4yjf5vb84ddOB 0RZwbjR9EFwxmMOk8sS0G7I= X-Google-Smtp-Source: AG47ELsfSxv34e3PZDx3bwYqqED1ZyT5YmH1f/oqviXHlsw1rYV7HtV3/xYK+0qF1cmdrfeApsm2qw== X-Received: by 2002:a25:4643:: with SMTP id t64-v6mr5643245yba.100.1520887774566; Mon, 12 Mar 2018 13:49:34 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id k125sm3110063ywe.85.2018.03.12.13.49.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Mar 2018 13:49:34 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, William Breathitt Gray Subject: [PATCH 4/8] gpio: pcie-idio-24: Implement get_multiple callback Date: Mon, 12 Mar 2018 16:49:28 -0400 Message-Id: <5d46c780a6e3be82e672dbd17ba70d275e35b51b.1520886945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: References: Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ACCES I/O PCIe-IDIO-24 series of devices provides 24 optically-isolated digital inputs accessed via three 8-bit ports. Since eight input lines are acquired on a single port input read, the PCIe-IDIO-24 GPIO driver may improve multiple input reads by utilizing a get_multiple callback. This patch implements the idio_24_gpio_get_multiple function which serves as the respective get_multiple callback. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-pcie-idio-24.c | 63 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 63 insertions(+) diff --git a/drivers/gpio/gpio-pcie-idio-24.c b/drivers/gpio/gpio-pcie-idio-24.c index f666e2e69074..6efc85292c49 100644 --- a/drivers/gpio/gpio-pcie-idio-24.c +++ b/drivers/gpio/gpio-pcie-idio-24.c @@ -193,6 +193,68 @@ static int idio_24_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(ioread8(&idio24gpio->reg->ttl_in0_7) & offset_mask); } +static int idio_24_gpio_get_multiple(struct gpio_chip *chip, + unsigned long *mask, unsigned long *bits) +{ + struct idio_24_gpio *const idio24gpio = gpiochip_get_data(chip); + struct idio_24_gpio_reg __iomem *const reg = idio24gpio->reg; + unsigned int i; + const unsigned int gpio_reg_size = 8; + unsigned int bit_word_offset; + unsigned int bits_mask; + const unsigned long reg_mask = GENMASK(gpio_reg_size, 0); + unsigned long port_state; + const unsigned long out_mode_mask = BIT(1); + + /* clear bits array to a clean slate */ + for (i = 0; i < chip->ngpio; i += BITS_PER_LONG) + bits[i / BITS_PER_LONG] = 0; + + /* get bits are evaluated a gpio register size at a time */ + for (i = 0; i < chip->ngpio; i += gpio_reg_size) { + bit_word_offset = i % BITS_PER_LONG; + bits_mask = mask[BIT_WORD(i)] & (reg_mask << bit_word_offset); + if (!bits_mask) { + /* no get bits in this register so skip to next one */ + continue; + } + + /* read bits from current gpio register */ + switch (i / gpio_reg_size) { + case 0: + port_state = ioread8(®->out0_7); + break; + case 1: + port_state = ioread8(®->out8_15); + break; + case 2: + port_state = ioread8(®->out16_23); + break; + case 3: + port_state = ioread8(®->in0_7); + break; + case 4: + port_state = ioread8(®->in8_15); + break; + case 5: + port_state = ioread8(®->in16_23); + break; + case 6: + /* TTL/CMOS Outputs/Inputs */ + if (ioread8(®->ctl) & out_mode_mask) + port_state = ioread8(®->ttl_out0_7); + else + port_state = ioread8(®->ttl_in0_7); + break; + } + + /* store acquired bits */ + bits[BIT_WORD(i)] |= port_state << bit_word_offset; + } + + return 0; +} + static void idio_24_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { @@ -397,6 +459,7 @@ static int idio_24_probe(struct pci_dev *pdev, const struct pci_device_id *id) idio24gpio->chip.direction_input = idio_24_gpio_direction_input; idio24gpio->chip.direction_output = idio_24_gpio_direction_output; idio24gpio->chip.get = idio_24_gpio_get; + idio24gpio->chip.get_multiple = idio_24_gpio_get_multiple; idio24gpio->chip.set = idio_24_gpio_set; raw_spin_lock_init(&idio24gpio->lock);