@@ -136,6 +136,15 @@ struct ad7768_clk_configuration {
enum ad7768_pwrmode pwrmode;
};
+enum ad7768_scan_type {
+ AD7768_SCAN_TYPE_NORMAL,
+ AD7768_SCAN_TYPE_HIGH_SPEED,
+};
+
+static const int ad7768_mclk_div_rates[4] = {
+ 16, 8, 4, 2,
+};
+
static const struct ad7768_clk_configuration ad7768_clk_config[] = {
{ AD7768_MCLK_DIV_2, AD7768_DEC_RATE_8, 16, AD7768_FAST_MODE },
{ AD7768_MCLK_DIV_2, AD7768_DEC_RATE_16, 32, AD7768_FAST_MODE },
@@ -150,6 +159,23 @@ static const struct ad7768_clk_configuration ad7768_clk_config[] = {
{ AD7768_MCLK_DIV_16, AD7768_DEC_RATE_1024, 16384, AD7768_ECO_MODE },
};
+static const struct iio_scan_type ad7768_scan_type[] = {
+ [AD7768_SCAN_TYPE_NORMAL] = {
+ .sign = 's',
+ .realbits = 24,
+ .storagebits = 32,
+ .shift = 8,
+ .endianness = IIO_BE,
+ },
+ [AD7768_SCAN_TYPE_HIGH_SPEED] = {
+ .sign = 's',
+ .realbits = 16,
+ .storagebits = 32,
+ .shift = 16,
+ .endianness = IIO_BE,
+ },
+};
+
static const struct iio_chan_spec ad7768_channels[] = {
{
.type = IIO_VOLTAGE,
@@ -159,13 +185,9 @@ static const struct iio_chan_spec ad7768_channels[] = {
.indexed = 1,
.channel = 0,
.scan_index = 0,
- .scan_type = {
- .sign = 's',
- .realbits = 24,
- .storagebits = 32,
- .shift = 8,
- .endianness = IIO_BE,
- },
+ .has_ext_scan_type = 1,
+ .ext_scan_type = ad7768_scan_type,
+ .num_ext_scan_type = ARRAY_SIZE(ad7768_scan_type),
},
};
@@ -178,6 +200,7 @@ struct ad7768_state {
struct gpio_chip gpiochip;
unsigned int gpio_avail_map;
unsigned int mclk_freq;
+ unsigned int dec_rate;
unsigned int samp_freq;
struct completion completion;
struct iio_trigger *trig;
@@ -201,14 +224,19 @@ struct ad7768_state {
static int ad7768_spi_reg_read(void *context, unsigned int addr,
unsigned int *val)
{
+ const struct iio_scan_type *scan_type;
struct iio_dev *dev = context;
struct ad7768_state *st;
unsigned int shift, len;
int ret;
st = iio_priv(dev);
+ scan_type = iio_get_current_scan_type(dev, &dev->channels[0]);
+ if (IS_ERR(scan_type))
+ return PTR_ERR(scan_type);
+
/* Regular value size is 1 Byte, but 3 Bytes for ADC data */
- len = (addr == AD7768_REG_ADC_DATA) ? 3 : 1;
+ len = (addr == AD7768_REG_ADC_DATA) ? BITS_TO_BYTES(scan_type->realbits) : 1;
shift = 32 - (8 * len);
st->data.d8[0] = AD7768_RD_FLAG_MSK(addr);
@@ -479,6 +507,8 @@ static int ad7768_set_freq(struct ad7768_state *st,
if (ret < 0)
return ret;
+ st->dec_rate = ad7768_clk_config[idx].clk_div /
+ ad7768_mclk_div_rates[ad7768_clk_config[idx].mclk_div];
st->samp_freq = DIV_ROUND_CLOSEST(st->mclk_freq,
ad7768_clk_config[idx].clk_div);
@@ -517,8 +547,13 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
int *val, int *val2, long info)
{
struct ad7768_state *st = iio_priv(indio_dev);
+ const struct iio_scan_type *scan_type;
int scale_uv, ret;
+ scan_type = iio_get_current_scan_type(indio_dev, chan);
+ if (IS_ERR(scan_type))
+ return PTR_ERR(scan_type);
+
switch (info) {
case IIO_CHAN_INFO_RAW:
ret = iio_device_claim_direct_mode(indio_dev);
@@ -527,7 +562,7 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
ret = ad7768_scan_direct(indio_dev);
if (ret >= 0)
- *val = sign_extend32(ret, chan->scan_type.realbits - 1);
+ *val = sign_extend32(ret, scan_type->realbits - 1);
iio_device_release_direct_mode(indio_dev);
if (ret < 0)
@@ -541,7 +576,7 @@ static int ad7768_read_raw(struct iio_dev *indio_dev,
return scale_uv;
*val = (scale_uv * 2) / 1000;
- *val2 = chan->scan_type.realbits;
+ *val2 = scan_type->realbits;
return IIO_VAL_FRACTIONAL_LOG2;
@@ -585,11 +620,21 @@ static const struct attribute_group ad7768_group = {
.attrs = ad7768_attributes,
};
+static int ad7768_get_current_scan_type(const struct iio_dev *indio_dev,
+ const struct iio_chan_spec *chan)
+{
+ struct ad7768_state *st = iio_priv(indio_dev);
+
+ return st->dec_rate == 8 ? AD7768_SCAN_TYPE_HIGH_SPEED :
+ AD7768_SCAN_TYPE_NORMAL;
+}
+
static const struct iio_info ad7768_info = {
.attrs = &ad7768_group,
.read_raw = &ad7768_read_raw,
.write_raw = &ad7768_write_raw,
.read_label = ad7768_read_label,
+ .get_current_scan_type = &ad7768_get_current_scan_type,
.debugfs_reg_access = &ad7768_reg_access,
};
@@ -644,9 +689,15 @@ static irqreturn_t ad7768_trigger_handler(int irq, void *p)
struct iio_poll_func *pf = p;
struct iio_dev *indio_dev = pf->indio_dev;
struct ad7768_state *st = iio_priv(indio_dev);
+ const struct iio_scan_type *scan_type;
int ret;
- ret = spi_read(st->spi, &st->data.scan.chan, 3);
+ scan_type = iio_get_current_scan_type(indio_dev, &indio_dev->channels[0]);
+ if (IS_ERR(scan_type))
+ return PTR_ERR(scan_type);
+
+ ret = spi_read(st->spi, &st->data.scan.chan,
+ BITS_TO_BYTES(scan_type->realbits));
if (ret < 0)
goto out;
When the device is configured to Sinc5 filter and decimation x8, output data is reduced to 16-bits in order to support 1 MHz of sampling frequency due to clock limitation. Use multiple scan types feature to enable the driver to switch scan type in runtime, making possible to support both 24-bit and 16-bit resolution. Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> --- v2 Changes: * Included the ".shift" value back to scan_type. * Changed the number of bytes from regmap_read instead of shifting the ADC sample value when the word size is lower (16-bits). --- drivers/iio/adc/ad7768-1.c | 73 ++++++++++++++++++++++++++++++++------ 1 file changed, 62 insertions(+), 11 deletions(-)