From patchwork Mon Mar 12 20:50:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 10277459 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 76C7D60211 for ; Mon, 12 Mar 2018 20:51:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6A78E28E89 for ; Mon, 12 Mar 2018 20:51:03 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5D6D228F34; Mon, 12 Mar 2018 20:51:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,FREEMAIL_FROM,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A09CE28E80 for ; Mon, 12 Mar 2018 20:50:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932507AbeCLUua (ORCPT ); Mon, 12 Mar 2018 16:50:30 -0400 Received: from mail-yw0-f196.google.com ([209.85.161.196]:41450 "EHLO mail-yw0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932525AbeCLUu2 (ORCPT ); Mon, 12 Mar 2018 16:50:28 -0400 Received: by mail-yw0-f196.google.com with SMTP id w12so6393696ywa.8; Mon, 12 Mar 2018 13:50:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kLDV0HGYgPPJceXoBrDErFSjfMCg52cjK/Oh29azbnY=; b=f2TjsVWAWLp4/v5DsuinWt7UwURkbKV2aklYcdTP7T6zY7oYMZyHr6hyhFsYCk6eGQ PnRk1zTG/+NiJIm1UIj/aVoOIxidcfTO9xE096pQ6MgZTlDTofJ9PeChdK5ocmMFBZLW hXxhnALMtxyvAp7M6vPjHGWfCC2+C/BIOhhMiP+IyOzsr1tnHphBmjV+OXiUmHE3LeAA lfNidc413iqw/u0fQCY05N130puhkV5f7iCE2FQiUtx8PPC+syTEBSKmYSPfrPTrkAWc tmc2S0RAdoB6L99ASPSClyktEhHMhFuaxj2cBE70PMhYjDy+y3C3R9WLRnB+YlEhOCr6 mowg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kLDV0HGYgPPJceXoBrDErFSjfMCg52cjK/Oh29azbnY=; b=TTHkxY1ck+rOFN4kIC11o+yQGAy9TPyz5M/tHQIyvtvPMlUgF/7kGagHTDM5bYLwm5 PZdecAl+46ews4h47Byc88dVNrxzHxJ46AaW/tCfWFZ1Psee2hInTI7QnzJuXXq4h+1X YT0WvlZ7Lo4dtkRiYyTGqU1ZiV+HFyWnLewYfMRF5C9/vz25Tbi8QWjuyR4L+X9eQlAJ CFJQA7X6BLrvKAXvDB9xfuMfg9nKrL38bTEJfpmVNJQHpwzzF5y0ptePK6Tx+ZAJ6vWt vDZTsJJLGr/1SOi9ivcZduFBQIryaVDHbWC/V+Y6todLnXiYLzXnbtaGXOL6tj9Qf9U7 gsdQ== X-Gm-Message-State: AElRT7HfXH+TaVAUHzdSlVq/ahDUb5qwvd44s4z8eGAPFipfpP2jSV2n zeg3eC8fUXdzP1yjaoroSBY= X-Google-Smtp-Source: AG47ELtpTFTklStmBgf3l3e0V5g0af3jZbnc1iH4Pxf77ORAgS8oQ/IQRm4qZeETuW21jGWTviKqoQ== X-Received: by 2002:a25:84c5:: with SMTP id x5-v6mr3413111ybm.430.1520887828067; Mon, 12 Mar 2018 13:50:28 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id l15sm3364437ywk.44.2018.03.12.13.50.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 12 Mar 2018 13:50:27 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, William Breathitt Gray Subject: [PATCH 7/8] gpio: gpio-mm: Implement get_multiple callback Date: Mon, 12 Mar 2018 16:50:22 -0400 Message-Id: <909f0d3dac7a9f24cfd92f05f4d1e84f569162b1.1520886945.git.vilhelm.gray@gmail.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: References: Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Diamond Systems GPIO-MM series of devices contain two 82C55A devices, which each feature three 8-bit ports of I/O. Since eight input lines are acquired on a single port input read, the GPIO-MM GPIO driver may improve multiple input reads by utilizing a get_multiple callback. This patch implements the gpiomm_gpio_get_multiple function which serves as the respective get_multiple callback. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-gpio-mm.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/gpio/gpio-gpio-mm.c b/drivers/gpio/gpio-gpio-mm.c index 11ade5b288f8..5bacfa1f2c02 100644 --- a/drivers/gpio/gpio-gpio-mm.c +++ b/drivers/gpio/gpio-gpio-mm.c @@ -171,6 +171,46 @@ static int gpiomm_gpio_get(struct gpio_chip *chip, unsigned int offset) return !!(port_state & mask); } +static int gpiomm_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, + unsigned long *bits) +{ + struct gpiomm_gpio *const gpiommgpio = gpiochip_get_data(chip); + unsigned int i; + const unsigned int gpio_reg_size = 8; + unsigned int bit_word_offset; + unsigned int bits_mask; + const unsigned long reg_mask = GENMASK(gpio_reg_size, 0); + unsigned int port; + unsigned int in_port; + unsigned long port_state; + + /* clear bits array to a clean slate */ + for (i = 0; i < chip->ngpio; i += BITS_PER_LONG) + bits[i / BITS_PER_LONG] = 0; + + /* get bits are evaluated a gpio register size at a time */ + for (i = 0; i < chip->ngpio; i += gpio_reg_size) { + bit_word_offset = i % BITS_PER_LONG; + bits_mask = mask[BIT_WORD(i)] & (reg_mask << bit_word_offset); + if (!bits_mask) { + /* no get bits in this register so skip to next one */ + continue; + } + + /* compute input port offset */ + port = i / gpio_reg_size; + in_port = (port > 2) ? port + 1 : port; + + /* get input bits */ + port_state = inb(gpiommgpio->base + in_port); + + /* store acquired bits */ + bits[BIT_WORD(i)] |= port_state << bit_word_offset; + } + + return 0; +} + static void gpiomm_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { @@ -268,6 +308,7 @@ static int gpiomm_probe(struct device *dev, unsigned int id) gpiommgpio->chip.direction_input = gpiomm_gpio_direction_input; gpiommgpio->chip.direction_output = gpiomm_gpio_direction_output; gpiommgpio->chip.get = gpiomm_gpio_get; + gpiommgpio->chip.get_multiple = gpiomm_gpio_get_multiple; gpiommgpio->chip.set = gpiomm_gpio_set; gpiommgpio->chip.set_multiple = gpiomm_gpio_set_multiple; gpiommgpio->base = base[id];