From patchwork Wed Mar 14 18:11:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rodrigo Siqueira X-Patchwork-Id: 10283209 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9CEAF602C2 for ; Wed, 14 Mar 2018 18:13:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8D29A2851E for ; Wed, 14 Mar 2018 18:13:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8193B28574; Wed, 14 Mar 2018 18:13:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,FREEMAIL_FROM,RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 105EA2851E for ; Wed, 14 Mar 2018 18:13:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751430AbeCNSM5 (ORCPT ); Wed, 14 Mar 2018 14:12:57 -0400 Received: from mail-qk0-f194.google.com ([209.85.220.194]:37714 "EHLO mail-qk0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752227AbeCNSL3 (ORCPT ); Wed, 14 Mar 2018 14:11:29 -0400 Received: by mail-qk0-f194.google.com with SMTP id y137so4488967qka.4; Wed, 14 Mar 2018 11:11:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=Va1AazZltjJlfndFUSyVbvWdKC7je2qAkiEqo8fgnmM=; b=P/tLFmZ54BFwvOa/ENpG4lNkcLo3iMdxFK0J0nUPEAMFgVTrA1y5Jn87+VSep74gEY w2ANgnpB21gRgwKvss4b18sPAy/fFmEOyICBQ+CKI1NLpN0XEM1s9z03hSbb5hdY9thp pIjADcIV6WMgxyrYJBfZD17WBvNe+vjSk8CO3mhsUJys4KV4wSwP2q6cNDFD2wvB405g tt+EN6pUdiwG7opy591dS/xGTg7X5ZuCsO/vqROyA/WgKzDeB7qr92H1nOKHQkpEEfzr iHetZn+bY20D1be1Hb7tVkzokkqX76GqZDA5t6tS3jlhSFFruIvo6Nx41ZbIJr4AYQNo USFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=Va1AazZltjJlfndFUSyVbvWdKC7je2qAkiEqo8fgnmM=; b=R87vkdq6wvGSBc9mrW8ozcZYFXDV9Ew/n7ISPxsh3j63RfsWaFAoCZO1pOPgFhZcRz fszyQvEEXpe03DMMa13gNcuprn5bWj/xoh9L6b0IJjf84jdJ0OWLJ9HD1foUMdbCxWcv Qw9RjDf2ftbHAXxMhu5+TVJgtCAdPUwZIkLyJEjpDFkzTI5IrugGHS+Re0x7IKlqOFMR EehhqN7oKX3x6/j83u7YVBoX0wEJrXtz9XAD5TrDwGp2/W890KA+qQqVCo1xIHGBECmk tLB35NdQgN/LPKF4IIXfKcwO2yDJiy8Wi37vL3n74SCWJy5Gds+OUqzXJIVKCaWfAYuu TlJA== X-Gm-Message-State: AElRT7EV+2pkkl8eIxR71rgZaukwDgSQHj9dMsrlK9i1qIZsLw+pxRIR fNRL5TqBvzNuzW2c1xpj4Oo= X-Google-Smtp-Source: AG47ELvyB7wGeT+pPRbVk8ONYHHaErC5jy47tLL4CAWSlQdRkZzsYeu5Z3M5DtJNguQjE+7kDCIp0w== X-Received: by 10.55.17.105 with SMTP id b102mr8339090qkh.136.1521051088455; Wed, 14 Mar 2018 11:11:28 -0700 (PDT) Received: from smtp.gmail.com ([143.107.45.1]) by smtp.gmail.com with ESMTPSA id j1sm1843583qkk.39.2018.03.14.11.11.25 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 14 Mar 2018 11:11:27 -0700 (PDT) Date: Wed, 14 Mar 2018 15:11:24 -0300 From: Rodrigo Siqueira To: Jonathan Cameron , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , Greg Kroah-Hartman , Barry Song <21cnbao@gmail.com>, John Syne Cc: daniel.baluta@nxp.com, linux-iio@vger.kernel.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/7] staging:iio:ade7854: Rework SPI read function Message-ID: <9d661f84a0745cd6f71c260fa2856bc0d8cf593e.1521037060.git.rodrigosiqueiramelo@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20180223 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Rework read SPI function to reduce the code duplication and centralizes all the task in a single function. Signed-off-by: Rodrigo Siqueira --- drivers/staging/iio/meter/ade7854-spi.c | 132 ++++++++++---------------------- 1 file changed, 41 insertions(+), 91 deletions(-) diff --git a/drivers/staging/iio/meter/ade7854-spi.c b/drivers/staging/iio/meter/ade7854-spi.c index df3df85f9440..0feef24aa888 100644 --- a/drivers/staging/iio/meter/ade7854-spi.c +++ b/drivers/staging/iio/meter/ade7854-spi.c @@ -67,9 +67,10 @@ static int ade7854_spi_write_reg(struct device *dev, return ret; } -static int ade7854_spi_read_reg_8(struct device *dev, - u16 reg_address, - u8 *val) +static int ade7854_spi_read_reg(struct device *dev, + u16 reg_address, + u32 *val, + enum data_size type) { struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ade7854_state *st = iio_priv(indio_dev); @@ -82,7 +83,7 @@ static int ade7854_spi_read_reg_8(struct device *dev, }, { .rx_buf = st->rx, .bits_per_word = 8, - .len = 1, + .len = type, } }; @@ -94,51 +95,52 @@ static int ade7854_spi_read_reg_8(struct device *dev, ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); if (ret) { - dev_err(&st->spi->dev, "problem when reading 8 bit register 0x%02X", + dev_err(&st->spi->dev, "problem when reading register 0x%02X", reg_address); - goto error_ret; + goto error_spi_read_unlock; + } + + switch (type) { + case DATA_SIZE_8_BITS: + *val = st->rx[0]; + break; + case DATA_SIZE_16_BITS: + *val = be16_to_cpup((const __be16 *)st->rx); + break; + case DATA_SIZE_24_BITS: + *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2]; + break; + case DATA_SIZE_32_BITS: + *val = be32_to_cpup((const __be32 *)st->rx); + break; } - *val = st->rx[0]; -error_ret: +error_spi_read_unlock: mutex_unlock(&st->buf_lock); return ret; } +static int ade7854_spi_read_reg_8(struct device *dev, + u16 reg_address, + u8 *val) +{ + int ret; + + ret = ade7854_spi_read_reg(dev, reg_address, (u32 *)val, + DATA_SIZE_8_BITS); + + return ret; +} + static int ade7854_spi_read_reg_16(struct device *dev, u16 reg_address, u16 *val) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); int ret; - struct spi_transfer xfers[] = { - { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 3, - }, { - .rx_buf = st->rx, - .bits_per_word = 8, - .len = 2, - } - }; - mutex_lock(&st->buf_lock); - st->tx[0] = ADE7854_READ_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; + ret = ade7854_spi_read_reg(dev, reg_address, (u32 *)val, + DATA_SIZE_16_BITS); - ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); - if (ret) { - dev_err(&st->spi->dev, "problem when reading 16 bit register 0x%02X", - reg_address); - goto error_ret; - } - *val = be16_to_cpup((const __be16 *)st->rx); - -error_ret: - mutex_unlock(&st->buf_lock); return ret; } @@ -146,37 +148,11 @@ static int ade7854_spi_read_reg_24(struct device *dev, u16 reg_address, u32 *val) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); int ret; - struct spi_transfer xfers[] = { - { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 3, - }, { - .rx_buf = st->rx, - .bits_per_word = 8, - .len = 3, - } - }; - mutex_lock(&st->buf_lock); - - st->tx[0] = ADE7854_READ_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; + ret = ade7854_spi_read_reg(dev, reg_address, (u32 *)val, + DATA_SIZE_24_BITS); - ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); - if (ret) { - dev_err(&st->spi->dev, "problem when reading 24 bit register 0x%02X", - reg_address); - goto error_ret; - } - *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2]; - -error_ret: - mutex_unlock(&st->buf_lock); return ret; } @@ -184,37 +160,11 @@ static int ade7854_spi_read_reg_32(struct device *dev, u16 reg_address, u32 *val) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); - struct ade7854_state *st = iio_priv(indio_dev); int ret; - struct spi_transfer xfers[] = { - { - .tx_buf = st->tx, - .bits_per_word = 8, - .len = 3, - }, { - .rx_buf = st->rx, - .bits_per_word = 8, - .len = 4, - } - }; - mutex_lock(&st->buf_lock); - - st->tx[0] = ADE7854_READ_REG; - st->tx[1] = (reg_address >> 8) & 0xFF; - st->tx[2] = reg_address & 0xFF; + ret = ade7854_spi_read_reg(dev, reg_address, (u32 *)val, + DATA_SIZE_32_BITS); - ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers)); - if (ret) { - dev_err(&st->spi->dev, "problem when reading 32 bit register 0x%02X", - reg_address); - goto error_ret; - } - *val = be32_to_cpup((const __be32 *)st->rx); - -error_ret: - mutex_unlock(&st->buf_lock); return ret; }