From patchwork Sat Mar 17 15:51:25 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Breathitt Gray X-Patchwork-Id: 10290891 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5D5C860385 for ; Sat, 17 Mar 2018 15:51:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4E3E128E90 for ; Sat, 17 Mar 2018 15:51:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 425D628F77; Sat, 17 Mar 2018 15:51:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D08CD28E90 for ; Sat, 17 Mar 2018 15:51:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753806AbeCQPvc (ORCPT ); Sat, 17 Mar 2018 11:51:32 -0400 Received: from mail-yw0-f196.google.com ([209.85.161.196]:37679 "EHLO mail-yw0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753464AbeCQPvb (ORCPT ); Sat, 17 Mar 2018 11:51:31 -0400 Received: by mail-yw0-f196.google.com with SMTP id y23so8920933ywy.4; Sat, 17 Mar 2018 08:51:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NwhNVCYo8Ezucz2wqLGkqBLH79QqtTZNGlqFS4X+PJE=; b=EUDYgpNCg6Z3Vf46Dcif22z/DnhhYdd4kuQ5zYwjSk71yGA2fjF3/v1KASDFzAHWgs F/n8b2lLobUdSYPCBT0pAK7dN/drd6GfagXCWjFVzpBcwL+1U+ElkQS8hGjCbHKWYgG7 6PsmjIbjABR/KtE4dgOVlzqsb2G1O5OrAIaXXK8wcBkBgY+7r3XgKOCHh15jlhdBSOge bw6gy8aKDSbQ1HcfaQZTvAo8Zlj9OL5+ABU0sSHOh2cjzEMvpyGoEb/1SnFzsF4lKGvA tH0DIFoyuMb8vBXqiJBPKxEfG9x9xr5V9oGgs5fhbl7kQhk3qpoAlRczxsr6YVe40lOs Zcuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NwhNVCYo8Ezucz2wqLGkqBLH79QqtTZNGlqFS4X+PJE=; b=Db6rgf9p08af75tsbaT1Zh0dIws8bM679PDzM6rTBWOleuyLZxBMSjLCmeR8rqyUOp nOQ/IF1XzLRR+7egA72SG3i88nEPNsiTNIhlKLL4OBWd0NWqd2evHjP6KLDf9F2OmmEm V4ZAB3/+l8Tlkjm42b0r4xl4fm6e9hcOc+Ml6w6xex6manldxgaNm2puEyNbV5q+t1sF t3vNgZx7PDm6ucJheb0BiGXvbshxfYv6oWX/9Pwh6HTMkQQnmUPiTi+9Ys32n9lDiPTC K4aczNg7pKAdHgrUSqSEwYaJ6mY/eNvkexnAA1wpuZ55Yo5886E1dazwhO75dVgyP4qO IxxQ== X-Gm-Message-State: AElRT7F1OGZwqz7HHxHS6bKS8XBLT6VkjiLQqMi2cpegVg1pBO20/kP1 Zw16h3Iz7JS19vm+t3eVhT60Ag== X-Google-Smtp-Source: AG47ELujxq1QEIwOVG+fLaps509zCuJcAtwJSwrpVDtLwrQ0iG4B64m//DrC8ARtX0QC/Fcy8W2g4A== X-Received: by 2002:a25:94e:: with SMTP id u14-v6mr3545768ybm.246.1521301890871; Sat, 17 Mar 2018 08:51:30 -0700 (PDT) Received: from localhost ([72.188.97.40]) by smtp.gmail.com with ESMTPSA id l199sm1133186ywe.14.2018.03.17.08.51.30 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 17 Mar 2018 08:51:30 -0700 (PDT) From: William Breathitt Gray To: linus.walleij@linaro.org Cc: andy.shevchenko@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, William Breathitt Gray Subject: [PATCH v3 5/8] gpio: 104-dio-48e: Implement get_multiple callback Date: Sat, 17 Mar 2018 11:51:25 -0400 Message-Id: X-Mailer: git-send-email 2.16.2 In-Reply-To: References: Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The ACCES I/O 104-DIO-48E series of devices contain two Programmable Peripheral Interface (PPI) chips of type 82C55, which each feature three 8-bit ports of I/O. Since eight input lines are acquired on a single port input read, the 104-DIO-48E GPIO driver may improve multiple input reads by utilizing a get_multiple callback. This patch implements the dio48e_gpio_get_multiple function which serves as the respective get_multiple callback. Signed-off-by: William Breathitt Gray --- drivers/gpio/gpio-104-dio-48e.c | 47 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/drivers/gpio/gpio-104-dio-48e.c b/drivers/gpio/gpio-104-dio-48e.c index bab3b94c5cbc..7d43c77364db 100644 --- a/drivers/gpio/gpio-104-dio-48e.c +++ b/drivers/gpio/gpio-104-dio-48e.c @@ -14,6 +14,7 @@ * This driver supports the following ACCES devices: 104-DIO-48E and * 104-DIO-24E. */ +#include #include #include #include @@ -182,6 +183,51 @@ static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset) return !!(port_state & mask); } +static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask, + unsigned long *bits) +{ + struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); + size_t i; + const size_t ports[] = { 0, 1, 2, 4, 5, 6 }; + const unsigned int gpio_reg_size = 8; + unsigned int bits_offset; + size_t word_index; + unsigned int word_offset; + unsigned long word_mask; + const unsigned long port_mask = GENMASK(gpio_reg_size, 0); + unsigned long port_state; + + /* clear bits array to a clean slate */ + bitmap_zero(bits, chip->ngpio); + + /* get bits are evaluated a gpio port register at a time */ + for (i = 0; i < ARRAY_SIZE(ports); i++) { + /* gpio offset in bits array */ + bits_offset = i * gpio_reg_size; + + /* word index for bits array */ + word_index = BIT_WORD(bits_offset); + + /* gpio offset within current word of bits array */ + word_offset = bits_offset % BITS_PER_LONG; + + /* mask of get bits for current gpio within current word */ + word_mask = mask[word_index] & (port_mask << word_offset); + if (!word_mask) { + /* no get bits in this port so skip to next one */ + continue; + } + + /* read bits from current gpio port */ + port_state = inb(dio48egpio->base + ports[i]); + + /* store acquired bits at respective bits array offset */ + bits[word_index] |= port_state << word_offset; + } + + return 0; +} + static void dio48e_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip); @@ -384,6 +430,7 @@ static int dio48e_probe(struct device *dev, unsigned int id) dio48egpio->chip.direction_input = dio48e_gpio_direction_input; dio48egpio->chip.direction_output = dio48e_gpio_direction_output; dio48egpio->chip.get = dio48e_gpio_get; + dio48egpio->chip.get_multiple = dio48e_gpio_get_multiple; dio48egpio->chip.set = dio48e_gpio_set; dio48egpio->chip.set_multiple = dio48e_gpio_set_multiple; dio48egpio->base = base[id];