From patchwork Tue Aug 6 14:12:50 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 2839425 Return-Path: X-Original-To: patchwork-linux-input@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6538C9F485 for ; Tue, 6 Aug 2013 14:00:06 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B706E201B9 for ; Tue, 6 Aug 2013 14:00:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0E888201B6 for ; Tue, 6 Aug 2013 13:59:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754350Ab3HFN7j (ORCPT ); Tue, 6 Aug 2013 09:59:39 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:17043 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753700Ab3HFN7h (ORCPT ); Tue, 6 Aug 2013 09:59:37 -0400 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Tue, 06 Aug 2013 06:58:59 -0700 Received: from hqemhub01.nvidia.com ([172.20.12.94]) by hqnvupgp07.nvidia.com (PGP Universal service); Tue, 06 Aug 2013 06:59:36 -0700 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Tue, 06 Aug 2013 06:59:36 -0700 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server id 8.3.298.1; Tue, 6 Aug 2013 06:59:36 -0700 Received: from sc-daphne.nvidia.com (Not Verified[172.20.232.60]) by hqnvemgw01.nvidia.com with MailMarshal (v7,1,2,5326) id ; Tue, 06 Aug 2013 06:59:36 -0700 Received: from ldewangan-ubuntu.nvidia.com ([10.19.65.30]) by sc-daphne.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r76DxP1r000690; Tue, 6 Aug 2013 06:59:33 -0700 (PDT) From: Laxman Dewangan To: , CC: , , , , , , Laxman Dewangan Subject: [PATCH 2/2] ARM: tegra: use dt-binding header for key code Date: Tue, 6 Aug 2013 19:42:50 +0530 Message-ID: <1375798370-2231-2-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1375798370-2231-1-git-send-email-ldewangan@nvidia.com> References: <1375798370-2231-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In place of hardcoding the key code in DTS file and comment the key code as side notes, use the key code macro defines in the dt-bindings/input/input.h directly. Signed-off-by: Laxman Dewangan --- arch/arm/boot/dts/tegra114-dalmore.dts | 9 +++++---- 1 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index 7c50d37..c56bf2d 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -1,5 +1,6 @@ /dts-v1/; +#include #include "tegra114.dtsi" / { @@ -1084,26 +1085,26 @@ home { label = "Home"; gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; - linux,code = <102>; /* KEY_HOME */ + linux,code = ; }; power { label = "Power"; gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; - linux,code = <116>; /* KEY_POWER */ + linux,code = ; gpio-key,wakeup; }; volume_down { label = "Volume Down"; gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; - linux,code = <114>; /* KEY_VOLUMEDOWN */ + linux,code = ; }; volume_up { label = "Volume Up"; gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; - linux,code = <115>; /* KEY_VOLUMEUP */ + linux,code = ; }; };