From patchwork Tue Oct 6 14:00:10 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Igor Grinberg X-Patchwork-Id: 7334941 Return-Path: X-Original-To: patchwork-linux-input@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 39A43BEEA4 for ; Tue, 6 Oct 2015 14:00:23 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3B6AD20660 for ; Tue, 6 Oct 2015 14:00:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CB97720656 for ; Tue, 6 Oct 2015 14:00:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752061AbbJFOAS (ORCPT ); Tue, 6 Oct 2015 10:00:18 -0400 Received: from softlayer.compulab.co.il ([50.23.254.55]:56154 "EHLO compulab.co.il" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751765AbbJFOAR (ORCPT ); Tue, 6 Oct 2015 10:00:17 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=compulab.co.il; s=default; h=Message-Id:Date:Subject:Cc:To:From; bh=SQDxEj7RFt149rj8CQnqqi585oMwdpfGI+/1BdVajFo=; b=xtiCGKk0UyI+IluheOE6nZVBrlgjDGUSf88rR/OVeIiUCXlcFdsc4bKZOP5aCemd2ZLofz6N5s6UHE5UMFYLhvq90zTf7wLOLlgoI6F3HmlS1iFUcdRSrZF7TzRQ4sd9mL9jHOo+l0eq1OP8LGN2SeJzk+2HFXcx7Zt/nvYLcLc=; Received: from [62.90.235.247] (port=34866 helo=zimbra-mta.compulab.co.il) by softlayer.compulab.co.il with esmtp (Exim 4.85) (envelope-from ) id 1ZjSmu-0002r3-KI; Tue, 06 Oct 2015 17:00:16 +0300 Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id BBBB548A0F3; Tue, 6 Oct 2015 17:00:15 +0300 (IDT) Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id OmvqB4CeEb9j; Tue, 6 Oct 2015 17:00:15 +0300 (IDT) Received: from localhost (localhost [127.0.0.1]) by zimbra-mta.compulab.co.il (Postfix) with ESMTP id 3597248A0F2; Tue, 6 Oct 2015 17:00:15 +0300 (IDT) X-Virus-Scanned: amavisd-new at zimbra-mta.compulab.co.il Received: from zimbra-mta.compulab.co.il ([127.0.0.1]) by localhost (zimbra-mta.compulab.co.il [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id CQUjXzyi6pqr; Tue, 6 Oct 2015 17:00:15 +0300 (IDT) Received: from mtiger (unknown [172.24.0.2]) by zimbra-mta.compulab.co.il (Postfix) with SMTP id 649F548A0F1; Tue, 6 Oct 2015 17:00:13 +0300 (IDT) Received: by mtiger (sSMTP sendmail emulation); Tue, 06 Oct 2015 17:00:13 +0300 From: Igor Grinberg To: Dmitry Torokhov Cc: linux-input@vger.kernel.org, Andrey Gelman , Haibo Chen , Igor Grinberg Subject: [PATCH] input: ads7846: correct the value got from SPI Date: Tue, 6 Oct 2015 17:00:10 +0300 Message-Id: <1444140010-23939-1-git-send-email-grinberg@compulab.co.il> X-Mailer: git-send-email 2.4.9 X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - softlayer.compulab.co.il X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - compulab.co.il X-Get-Message-Sender-Via: softlayer.compulab.co.il: acl_c_relayhosts_text_entry: grinberg@compulab.co.il|compulab.co.il Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Andrey Gelman According to the touch controller spec, SPI return a 16 bit value, only 12 bits are valid, they are bit[14-3]. The value of MISO and MOSI can be configured when SPI is in idle mode. Currently this touch driver assumes the SPI bus sets the MOSI and MISO in low level when SPI bus is in idle mode. So the bit[15] of the value got from SPI bus is always 0. But when SPI bus congfigures the MOSI and MISO in high level during the SPI idle mode, the bit[15] of the value get from SPI is always 1. If bit[15] is not masked, we may get the wrong value. Mask the invalid bit to make sure the correct value gets returned. Regardless of the SPI bus idle configuration. Signed-off-by: Andrey Gelman Signed-off-by: Haibo Chen Signed-off-by: Igor Grinberg --- drivers/input/touchscreen/ads7846.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c index 727d88c..8e2a44d 100644 --- a/drivers/input/touchscreen/ads7846.c +++ b/drivers/input/touchscreen/ads7846.c @@ -666,18 +666,22 @@ static int ads7846_no_filter(void *ads, int data_idx, int *val) static int ads7846_get_value(struct ads7846 *ts, struct spi_message *m) { + int value; struct spi_transfer *t = list_entry(m->transfers.prev, struct spi_transfer, transfer_list); if (ts->model == 7845) { - return be16_to_cpup((__be16 *)&(((char*)t->rx_buf)[1])) >> 3; + value = be16_to_cpup((__be16 *)&(((char*)t->rx_buf)[1])); } else { /* * adjust: on-wire is a must-ignore bit, a BE12 value, then * padding; built from two 8 bit values written msb-first. */ - return be16_to_cpup((__be16 *)t->rx_buf) >> 3; + value = be16_to_cpup((__be16 *)t->rx_buf); } + + /* enforce ADC output is 12 bits width */ + return (value >> 3) & 0xfff; } static void ads7846_update_value(struct spi_message *m, int val)