From patchwork Thu Oct 13 15:50:59 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Tissoires X-Patchwork-Id: 9375215 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 47FD76075E for ; Thu, 13 Oct 2016 15:51:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 381472A093 for ; Thu, 13 Oct 2016 15:51:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2CBEB2A145; Thu, 13 Oct 2016 15:51:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 567872A139 for ; Thu, 13 Oct 2016 15:51:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755810AbcJMPvf (ORCPT ); Thu, 13 Oct 2016 11:51:35 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34222 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755412AbcJMPvc (ORCPT ); Thu, 13 Oct 2016 11:51:32 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 862D531A33D; Thu, 13 Oct 2016 15:51:30 +0000 (UTC) Received: from plouf.banquise.eu.com (ovpn-116-101.ams2.redhat.com [10.36.116.101]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u9DFpERg008109; Thu, 13 Oct 2016 11:51:28 -0400 From: Benjamin Tissoires To: Dmitry Torokhov , Andrew Duggan , Lyude Paul , Christopher Heiny , Nick Dyer , Bjorn Andersson , Dennis Wassenberg Cc: linux-kernel@vger.kernel.org, linux-input@vger.kernel.org Subject: [PATCH v3 05/18] Input: synaptics-rmi4 - Add support for controlling dribble packets in F12 Date: Thu, 13 Oct 2016 17:50:59 +0200 Message-Id: <1476373872-18027-6-git-send-email-benjamin.tissoires@redhat.com> In-Reply-To: <1476373872-18027-1-git-send-email-benjamin.tissoires@redhat.com> References: <1476373872-18027-1-git-send-email-benjamin.tissoires@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Thu, 13 Oct 2016 15:51:30 +0000 (UTC) Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Andrew Duggan Implements reading and setting the dribble bit in F12's control registers. Signed-off-by: Andrew Duggan Acked-by: Benjamin Tissoires Signed-off-by: Benjamin Tissoires --- new in v3 --- drivers/input/rmi4/rmi_f12.c | 73 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 72 insertions(+), 1 deletion(-) diff --git a/drivers/input/rmi4/rmi_f12.c b/drivers/input/rmi4/rmi_f12.c index 767ac79..f79a785 100644 --- a/drivers/input/rmi4/rmi_f12.c +++ b/drivers/input/rmi4/rmi_f12.c @@ -31,6 +31,7 @@ enum rmi_f12_object_type { struct f12_data { struct rmi_2d_sensor sensor; struct rmi_2d_sensor_platform_data sensor_pdata; + bool has_dribble; u16 data_addr; @@ -239,12 +240,79 @@ static int rmi_f12_attention(struct rmi_function *fn, return 0; } +static int rmi_f12_write_control_regs(struct rmi_function *fn) +{ + int ret; + const struct rmi_register_desc_item *item; + struct rmi_device *rmi_dev = fn->rmi_dev; + struct f12_data *f12 = dev_get_drvdata(&fn->dev); + int control_size; + char buf[3]; + u16 control_offset = 0; + u8 subpacket_offset = 0; + + if (f12->has_dribble + && (f12->sensor.dribble != RMI_REG_STATE_DEFAULT)) { + item = rmi_get_register_desc_item(&f12->control_reg_desc, 20); + if (item) { + control_offset = rmi_register_desc_calc_reg_offset( + &f12->control_reg_desc, 20); + + /* + * The byte containing the EnableDribble bit will be + * in either byte 0 or byte 2 of control 20. Depending + * on the existence of subpacket 0. If control 20 is + * larger then 3 bytes, just read the first 3. + */ + if (item->reg_size >= 3) + control_size = 3; + else + control_size = item->reg_size; + + ret = rmi_read_block(rmi_dev, fn->fd.control_base_addr + + control_offset, buf, control_size); + if (ret) + return ret; + + if (rmi_register_desc_has_subpacket(item, 0)) + subpacket_offset += 1; + + switch (f12->sensor.dribble) { + case RMI_REG_STATE_OFF: + buf[subpacket_offset] &= ~BIT(2); + break; + case RMI_REG_STATE_ON: + buf[subpacket_offset] |= BIT(2); + break; + case RMI_REG_STATE_DEFAULT: + default: + break; + } + + ret = rmi_write_block(rmi_dev, + fn->fd.control_base_addr + control_offset, + buf, control_size); + if (ret) + return ret; + } + } + + return 0; + +} + static int rmi_f12_config(struct rmi_function *fn) { struct rmi_driver *drv = fn->rmi_dev->driver; + int ret; drv->set_irq_bits(fn->rmi_dev, fn->irq_mask); + ret = rmi_f12_write_control_regs(fn); + if (ret) + dev_warn(&fn->dev, + "Failed to write F12 control registers: %d\n", ret); + return 0; } @@ -271,7 +339,7 @@ static int rmi_f12_probe(struct rmi_function *fn) } ++query_addr; - if (!(buf & 0x1)) { + if (!(buf & BIT(0))) { dev_err(&fn->dev, "Behavior of F12 without register descriptors is undefined.\n"); return -ENODEV; @@ -281,6 +349,8 @@ static int rmi_f12_probe(struct rmi_function *fn) if (!f12) return -ENOMEM; + f12->has_dribble = !!(buf & BIT(3)); + if (fn->dev.of_node) { ret = rmi_2d_sensor_of_probe(&fn->dev, &f12->sensor_pdata); if (ret) @@ -329,6 +399,7 @@ static int rmi_f12_probe(struct rmi_function *fn) sensor->x_mm = f12->sensor_pdata.x_mm; sensor->y_mm = f12->sensor_pdata.y_mm; + sensor->dribble = f12->sensor_pdata.dribble; if (sensor->sensor_type == rmi_sensor_default) sensor->sensor_type =