From patchwork Mon Jul 6 11:43:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamel BOUHARA X-Patchwork-Id: 11645469 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0B5D113B6 for ; Mon, 6 Jul 2020 11:44:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EDC3720772 for ; Mon, 6 Jul 2020 11:44:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728969AbgGFLoI (ORCPT ); Mon, 6 Jul 2020 07:44:08 -0400 Received: from relay7-d.mail.gandi.net ([217.70.183.200]:38725 "EHLO relay7-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728845AbgGFLoI (ORCPT ); Mon, 6 Jul 2020 07:44:08 -0400 X-Originating-IP: 86.202.118.225 Received: from localhost (lfbn-lyo-1-23-225.w86-202.abo.wanadoo.fr [86.202.118.225]) (Authenticated sender: kamel.bouhara@bootlin.com) by relay7-d.mail.gandi.net (Postfix) with ESMTPSA id 153292000A; Mon, 6 Jul 2020 11:44:04 +0000 (UTC) From: Kamel Bouhara To: William Breathitt Gray , Rob Herring , Mark Rutland , Nicolas Ferre , Alexandre Belloni , Ludovic Desroches , linux-arm-kernel@lists.infradead.org Cc: Thomas Petazzoni , linux-input@vger.kernel.org, devicetree@vger.kernel.org, linux-iio@vger.kernel.org, Kamel Bouhara Subject: [PATCH v6 3/5] dt-bindings: microchip: atmel,at91rm9200-tcb: add sama5d2 compatible Date: Mon, 6 Jul 2020 13:43:45 +0200 Message-Id: <20200706114347.174452-4-kamel.bouhara@bootlin.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200706114347.174452-1-kamel.bouhara@bootlin.com> References: <20200706114347.174452-1-kamel.bouhara@bootlin.com> MIME-Version: 1.0 Sender: linux-input-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org From: Alexandre Belloni The sama5d2 TC block TIMER_CLOCK1 is different from the at91sam9x5 one. Instead of being MCK / 2, it is the TCB GCLK. Cc: Rob Herring Signed-off-by: Alexandre Belloni Signed-off-by: Kamel Bouhara Reviewed-by: Rob Herring --- .../soc/microchip/atmel,at91rm9200-tcb.yaml | 42 +++++++++++++++---- 1 file changed, 33 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml index 9d680e0b9109..d226fd7d5258 100644 --- a/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml +++ b/Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml @@ -19,6 +19,7 @@ properties: - enum: - atmel,at91rm9200-tcb - atmel,at91sam9x5-tcb + - atmel,sama5d2-tcb - const: simple-mfd - const: syscon @@ -36,15 +37,6 @@ properties: description: List of clock names. Always includes t0_clk and slow clk. Also includes t1_clk and t2_clk if a clock per channel is available. - oneOf: - - items: - - const: t0_clk - - const: slow_clk - - items: - - const: t0_clk - - const: t1_clk - - const: t2_clk - - const: slow_clk minItems: 2 maxItems: 4 @@ -75,6 +67,38 @@ patternProperties: - compatible - reg +allOf: + - if: + properties: + compatible: + contains: + const: atmel,sama5d2-tcb + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + items: + - const: t0_clk + - const: gclk + - const: slow_clk + else: + properties: + clocks: + minItems: 2 + maxItems: 4 + clock-names: + oneOf: + - items: + - const: t0_clk + - const: slow_clk + - items: + - const: t0_clk + - const: t1_clk + - const: t2_clk + - const: slow_clk + required: - compatible - reg