diff mbox series

[v2] ARM: dts: imx50-kobo-aura: Enable eKTF2132 touchscreen

Message ID 20201112233054.3837465-1-j.neuschaefer@gmx.net (mailing list archive)
State New, archived
Headers show
Series [v2] ARM: dts: imx50-kobo-aura: Enable eKTF2132 touchscreen | expand

Commit Message

J. Neuschäfer Nov. 12, 2020, 11:30 p.m. UTC 
The Kobo Aura has an eKTF2132 touchscreen controller.

Although the vendor kernel toggles a reset pin (GPIO5-12) during the
startup sequence, the touchscreen works without it.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---

v2:
- Fix devicetree build by adding #include <dt-bindings/interrupt-controller/irq.h>
- Drop the first two patches, which been applied in the meantime

v1:
- https://lore.kernel.org/lkml/20201106112412.390724-4-j.neuschaefer@gmx.net/
---
 arch/arm/boot/dts/imx50-kobo-aura.dts | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

--
2.28.0

Comments

Shawn Guo Nov. 16, 2020, 8:27 a.m. UTC | #1 
On Fri, Nov 13, 2020 at 12:30:54AM +0100, Jonathan Neuschäfer wrote:
> The Kobo Aura has an eKTF2132 touchscreen controller.
> 
> Although the vendor kernel toggles a reset pin (GPIO5-12) during the
> startup sequence, the touchscreen works without it.
> 
> Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>

Applied, thanks.
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/imx50-kobo-aura.dts b/arch/arm/boot/dts/imx50-kobo-aura.dts
index 53b3995d37e7f..97cfd970fe742 100644
--- a/arch/arm/boot/dts/imx50-kobo-aura.dts
+++ b/arch/arm/boot/dts/imx50-kobo-aura.dts
@@ -6,6 +6,7 @@ 
 /dts-v1/;
 #include "imx50.dtsi"
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/interrupt-controller/irq.h>

 / {
 	model = "Kobo Aura (N514)";
@@ -119,7 +120,14 @@  &i2c1 {
 	pinctrl-0 = <&pinctrl_i2c1>;
 	status = "okay";

-	/* TODO: ektf2132 touch controller at 0x15 */
+	touchscreen@15 {
+		reg = <0x15>;
+		compatible = "elan,ektf2132";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ts>;
+		power-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
+		interrupts-extended = <&gpio5 13 IRQ_TYPE_EDGE_FALLING>;
+	};
 };

 &i2c2 {
@@ -225,6 +233,13 @@  MX50_PAD_SD3_D7__ESDHC3_DAT7		0x1d4
 		>;
 	};

+	pinctrl_ts: tsgrp {
+		fsl,pins = <
+			MX50_PAD_CSPI_MOSI__GPIO4_9		0x0
+			MX50_PAD_SD2_D5__GPIO5_13		0x0
+		>;
+	};
+
 	pinctrl_uart2: uart2grp {
 		fsl,pins = <
 			MX50_PAD_UART2_TXD__UART2_TXD_MUX	0x1e4