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Tue, 12 Jul 2022 18:19:21 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by DM6NAM11FT021.mail.protection.outlook.com (10.13.173.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5417.15 via Frontend Transport; Tue, 12 Jul 2022 18:19:21 +0000 Received: from jatayu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Tue, 12 Jul 2022 13:19:19 -0500 From: Basavaraj Natikar To: , , CC: Basavaraj Natikar Subject: [PATCH 06/11] HID: amd_sfh: Add PM operations in amd_mp2_ops Date: Tue, 12 Jul 2022 23:48:31 +0530 Message-ID: <20220712181836.3488343-7-Basavaraj.Natikar@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220712181836.3488343-1-Basavaraj.Natikar@amd.com> References: <20220712181836.3488343-1-Basavaraj.Natikar@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ef00869f-b802-4727-7283-08da64330b20 X-MS-TrafficTypeDiagnostic: CH2PR12MB4890:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jul 2022 18:19:21.8038 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ef00869f-b802-4727-7283-08da64330b20 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT021.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4890 Precedence: bulk List-ID: X-Mailing-List: linux-input@vger.kernel.org Add PM operations as part of amd_mp2_ops structure to support all AMD SOCs and use wherever applicable. Signed-off-by: Basavaraj Natikar --- drivers/hid/amd-sfh-hid/amd_sfh_client.c | 54 ++++++++++++++++++++++++ drivers/hid/amd-sfh-hid/amd_sfh_common.h | 2 + drivers/hid/amd-sfh-hid/amd_sfh_pcie.c | 41 +----------------- 3 files changed, 58 insertions(+), 39 deletions(-) diff --git a/drivers/hid/amd-sfh-hid/amd_sfh_client.c b/drivers/hid/amd-sfh-hid/amd_sfh_client.c index e9ccdad66d12..b198b564db7d 100644 --- a/drivers/hid/amd-sfh-hid/amd_sfh_client.c +++ b/drivers/hid/amd-sfh-hid/amd_sfh_client.c @@ -155,6 +155,57 @@ const char *get_sensor_name(int idx) } } +static void amd_sfh_resume(struct amd_mp2_dev *mp2) +{ + struct amdtp_cl_data *cl_data = mp2->cl_data; + struct amd_mp2_sensor_info info; + int i, status; + + for (i = 0; i < cl_data->num_hid_devices; i++) { + if (cl_data->sensor_sts[i] == SENSOR_DISABLED) { + info.period = AMD_SFH_IDLE_LOOP; + info.sensor_idx = cl_data->sensor_idx[i]; + info.dma_address = cl_data->sensor_dma_addr[i]; + mp2->mp2_ops->start(mp2, info); + status = amd_sfh_wait_for_response + (mp2, cl_data->sensor_idx[i], SENSOR_ENABLED); + if (status == SENSOR_ENABLED) + cl_data->sensor_sts[i] = SENSOR_ENABLED; + dev_dbg(&mp2->pdev->dev, "resume sid 0x%x (%s) status 0x%x\n", + cl_data->sensor_idx[i], get_sensor_name(cl_data->sensor_idx[i]), + cl_data->sensor_sts[i]); + } + } + + schedule_delayed_work(&cl_data->work_buffer, msecs_to_jiffies(AMD_SFH_IDLE_LOOP)); + if (mp2->mp2_ops->clear_intr) + mp2->mp2_ops->clear_intr(mp2); +} + +static void amd_sfh_suspend(struct amd_mp2_dev *mp2) +{ + struct amdtp_cl_data *cl_data = mp2->cl_data; + int i, status; + + for (i = 0; i < cl_data->num_hid_devices; i++) { + if (cl_data->sensor_idx[i] != HPD_IDX && + cl_data->sensor_sts[i] == SENSOR_ENABLED) { + mp2->mp2_ops->stop(mp2, cl_data->sensor_idx[i]); + status = amd_sfh_wait_for_response + (mp2, cl_data->sensor_idx[i], SENSOR_DISABLED); + if (status != SENSOR_ENABLED) + cl_data->sensor_sts[i] = SENSOR_DISABLED; + dev_dbg(&mp2->pdev->dev, "suspend sid 0x%x (%s) status 0x%x\n", + cl_data->sensor_idx[i], get_sensor_name(cl_data->sensor_idx[i]), + cl_data->sensor_sts[i]); + } + } + + cancel_delayed_work_sync(&cl_data->work_buffer); + if (mp2->mp2_ops->clear_intr) + mp2->mp2_ops->clear_intr(mp2); +} + int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata) { struct amd_input_data *in_data = &privdata->in_data; @@ -172,6 +223,9 @@ int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata) dev = &privdata->pdev->dev; amd_sfh_set_desc_ops(mp2_ops); + mp2_ops->suspend = amd_sfh_suspend; + mp2_ops->resume = amd_sfh_resume; + cl_data->num_hid_devices = amd_mp2_get_sensor_num(privdata, &cl_data->sensor_idx[0]); INIT_DELAYED_WORK(&cl_data->work, amd_sfh_work); diff --git a/drivers/hid/amd-sfh-hid/amd_sfh_common.h b/drivers/hid/amd-sfh-hid/amd_sfh_common.h index d2a72ab64ebf..2b45d507ead7 100644 --- a/drivers/hid/amd-sfh-hid/amd_sfh_common.h +++ b/drivers/hid/amd-sfh-hid/amd_sfh_common.h @@ -54,6 +54,8 @@ struct amd_mp2_ops { void (*clear_intr)(struct amd_mp2_dev *privdata); int (*init_intr)(struct amd_mp2_dev *privdata); int (*discovery_status)(struct amd_mp2_dev *privdata); + void (*suspend)(struct amd_mp2_dev *mp2); + void (*resume)(struct amd_mp2_dev *mp2); int (*get_rep_desc)(int sensor_idx, u8 rep_desc[]); u32 (*get_desc_sz)(int sensor_idx, int descriptor_name); u8 (*get_feat_rep)(int sensor_idx, int report_id, u8 *feature_report); diff --git a/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c b/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c index f169b4413abb..be9ac3778f37 100644 --- a/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c +++ b/drivers/hid/amd-sfh-hid/amd_sfh_pcie.c @@ -339,28 +339,8 @@ static int amd_mp2_pci_probe(struct pci_dev *pdev, const struct pci_device_id *i static int __maybe_unused amd_mp2_pci_resume(struct device *dev) { struct amd_mp2_dev *mp2 = dev_get_drvdata(dev); - struct amdtp_cl_data *cl_data = mp2->cl_data; - struct amd_mp2_sensor_info info; - int i, status; - - for (i = 0; i < cl_data->num_hid_devices; i++) { - if (cl_data->sensor_sts[i] == SENSOR_DISABLED) { - info.period = AMD_SFH_IDLE_LOOP; - info.sensor_idx = cl_data->sensor_idx[i]; - info.dma_address = cl_data->sensor_dma_addr[i]; - mp2->mp2_ops->start(mp2, info); - status = amd_sfh_wait_for_response - (mp2, cl_data->sensor_idx[i], SENSOR_ENABLED); - if (status == SENSOR_ENABLED) - cl_data->sensor_sts[i] = SENSOR_ENABLED; - dev_dbg(dev, "suspend sid 0x%x (%s) status 0x%x\n", - cl_data->sensor_idx[i], get_sensor_name(cl_data->sensor_idx[i]), - cl_data->sensor_sts[i]); - } - } - schedule_delayed_work(&cl_data->work_buffer, msecs_to_jiffies(AMD_SFH_IDLE_LOOP)); - amd_sfh_clear_intr(mp2); + mp2->mp2_ops->resume(mp2); return 0; } @@ -368,25 +348,8 @@ static int __maybe_unused amd_mp2_pci_resume(struct device *dev) static int __maybe_unused amd_mp2_pci_suspend(struct device *dev) { struct amd_mp2_dev *mp2 = dev_get_drvdata(dev); - struct amdtp_cl_data *cl_data = mp2->cl_data; - int i, status; - - for (i = 0; i < cl_data->num_hid_devices; i++) { - if (cl_data->sensor_idx[i] != HPD_IDX && - cl_data->sensor_sts[i] == SENSOR_ENABLED) { - mp2->mp2_ops->stop(mp2, cl_data->sensor_idx[i]); - status = amd_sfh_wait_for_response - (mp2, cl_data->sensor_idx[i], SENSOR_DISABLED); - if (status != SENSOR_ENABLED) - cl_data->sensor_sts[i] = SENSOR_DISABLED; - dev_dbg(dev, "suspend sid 0x%x (%s) status 0x%x\n", - cl_data->sensor_idx[i], get_sensor_name(cl_data->sensor_idx[i]), - cl_data->sensor_sts[i]); - } - } - cancel_delayed_work_sync(&cl_data->work_buffer); - amd_sfh_clear_intr(mp2); + mp2->mp2_ops->suspend(mp2); return 0; }