From patchwork Wed Sep 25 00:59:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wesley Cheng X-Patchwork-Id: 13811453 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A1A915530C; Wed, 25 Sep 2024 01:01:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727226079; cv=none; b=bwXeHDqAtOZI+isZbXblcC4vYMQ6JBXytoLZrtF1hgebsAimMXpFRqoq1VBu4MrUK4TQpF65hklxcWpgqgjWQ8XZck1lQtV8YtGoPDh418nSUt+eH3Hd1aoeDclHpeysvxUEYNODJEpXsYPr9iEWc4ZKwABa8G/Dh6ud2DKUtOs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727226079; c=relaxed/simple; bh=ltXX8jP7pn8uVpu5KSPpn79cIYm5HfBGTiCUp+UHg9k=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=BqT3ARFr3gDg7ueXBylRSrP8F80PXOFr1Ao1Z8oiySkp0gjAa55SNxgtzNypQuVU48QHgON3xC+DoLedaFAKYixNoc90Q/Se6GdtFcWuPC2F1WGL5R9E8cH9GMqtkqCAtJWYjTgPz4S0T7W/zTMMSXRmFNx33Fyo8w/y6OcdroM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=SdMsFCeq; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="SdMsFCeq" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 48OHXsAg015817; Wed, 25 Sep 2024 01:00:15 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= AN6ZcvMWlqNjOXpEc6FdiWAhkqYqJERCJ3muWeL5xeM=; b=SdMsFCeqCZYgOJ6N wYWRJXR7SSig3oGKeFvuu0qb4DzrCQ6Z6g/03ddtGDarRosOHk/66Z5u4YC1GoWv oSXGRKXhyGkfLfT3JPc+Z1mA/8ddxhVJH31fp5dWbhdGjRlpqU7mT8mB2mSbyzn1 VUC+eGATMKNl1goeITJcQw0nyfdT71XOyjvz2BKrnlzyyHUP3rbYESfInvZVp2uN Z6zS09PPwhwpRxjBsxtAJxGIY2n+L6iWkM827iZGz5mzgXOjsjS54qMI6C8kkkic odY8on+7Jshf59EdaLVdnHa5rhiF0gm4yk0ptSKMt93M0vMTAoDGPP1lct0rMhlI BNfdPw== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41sn5bth74-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 25 Sep 2024 01:00:14 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 48P10Dwj032399 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 25 Sep 2024 01:00:13 GMT Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 24 Sep 2024 18:00:13 -0700 From: Wesley Cheng To: , , , , , , , , , , , , , , CC: , , , , , , , , Wesley Cheng Subject: [PATCH v28 07/32] usb: host: xhci-plat: Set XHCI max interrupters if property is present Date: Tue, 24 Sep 2024 17:59:35 -0700 Message-ID: <20240925010000.2231406-8-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240925010000.2231406-1-quic_wcheng@quicinc.com> References: <20240925010000.2231406-1-quic_wcheng@quicinc.com> Precedence: bulk X-Mailing-List: linux-input@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: MSFUBR-ARRURaFb-gH5Y2TATKB9eAJ3O X-Proofpoint-GUID: MSFUBR-ARRURaFb-gH5Y2TATKB9eAJ3O X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 adultscore=0 impostorscore=0 malwarescore=0 mlxlogscore=999 spamscore=0 mlxscore=0 priorityscore=1501 bulkscore=0 phishscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2408220000 definitions=main-2409250005 Some platforms may want to limit the number of XHCI interrupters allocated. This is passed to xhci-plat as a device property. Ensure that this is read and the max_interrupters field is set. Signed-off-by: Wesley Cheng --- drivers/usb/host/xhci-plat.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index 3d071b875308..1c12cadc02a1 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -258,6 +258,8 @@ int xhci_plat_probe(struct platform_device *pdev, struct device *sysdev, const s device_property_read_u32(tmpdev, "imod-interval-ns", &xhci->imod_interval); + device_property_read_u16(tmpdev, "num-hc-interrupters", + &xhci->max_interrupters); } /*