| Message ID | 0dd024cd-e05a-0d67-c1bf-1a532714bb1a@zytor.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Tue, Jun 5, 2018 at 7:31 PM, H. Peter Anvin <hpa@zytor.com> wrote: > On 06/05/18 10:28, H. Peter Anvin wrote: >> On 06/05/18 10:05, Nick Desaulniers wrote: >>> + >>> +/* >>> + * void native_restore_fl(unsigned long flags) >>> + * %rdi: flags >>> + */ >>> +ENTRY(native_restore_fl) >>> + push %_ASM_DI >>> + popf >>> + ret >>> +ENDPROC(native_restore_fl) >>> +EXPORT_SYMBOL(native_restore_fl) >>> >> >> To work on i386, this would have to be %_ASM_AX in that case. >> >> Something like this added to <asm/asm.h> might be useful; then you can >> simply: >> >> push %_ASM_ARG1 >> > > Version with fixed typo... Small typo in the commit-subject... s/argument registes/argument registers - sed@ - -- To unsubscribe from this list: send the line "unsubscribe linux-kbuild" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On 06/05/18 10:28, H. Peter Anvin wrote: > On 06/05/18 10:05, Nick Desaulniers wrote: >> + >> +/* >> + * void native_restore_fl(unsigned long flags) >> + * %rdi: flags >> + */ >> +ENTRY(native_restore_fl) >> + push %_ASM_DI >> + popf >> + ret >> +ENDPROC(native_restore_fl) >> +EXPORT_SYMBOL(native_restore_fl) >> > > To work on i386, this would have to be %_ASM_AX in that case. ? Does the kernel have a different calling convention for 32b x86? How does that work? regparm=3? Does that need to be added to the declaration? > Something like this added to <asm/asm.h> might be useful; then you can > simply: > > push %_ASM_ARG1 > > Version with fixed typo... Oh, nice, thanks! I'll pick this up and add it to my patch set for v3 (or did you want me to review/sign-off now?) I can pick up Sedat's suggestion.
On 06/05/18 10:52, Nick Desaulniers wrote: > > Does the kernel have a different calling convention for 32b x86? How > does that work? regparm=3? Does that need to be added to the > declaration? > Yes, -mregparm=3. No, doesn't need to be added to the declaration. >> Something like this added to <asm/asm.h> might be useful; then you can >> simply: >> >> push %_ASM_ARG1 >> >> Version with fixed typo... > > Oh, nice, thanks! I'll pick this up and add it to my patch set for v3 > (or did you want me to review/sign-off now?) I can pick up Sedat's > suggestion. > Add it to your patchset and add your own signoff underneath mine. -hpa -- To unsubscribe from this list: send the line "unsubscribe linux-kbuild" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
From 9946c03bc6648ea65e6f8e2576c390dca9555288 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" <hpa@linux.intel.com> Date: Tue, 5 Jun 2018 10:21:35 -0700 Subject: [PATCH] x86/asm: add _ASM_ARG* constants for argument registes to <asm/asm.h> i386 and x86-64 uses different registers for arguments; make them available so we don't have to #ifdef in the actual code. Native size and specified size (q, l, w, b) versions are provided. Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> --- arch/x86/include/asm/asm.h | 59 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/x86/include/asm/asm.h b/arch/x86/include/asm/asm.h index 219faaec51df..990770f9e76b 100644 --- a/arch/x86/include/asm/asm.h +++ b/arch/x86/include/asm/asm.h @@ -46,6 +46,65 @@ #define _ASM_SI __ASM_REG(si) #define _ASM_DI __ASM_REG(di) +#ifndef __x86_64__ +/* 32 bit */ + +#define _ASM_ARG1 _ASM_AX +#define _ASM_ARG2 _ASM_DX +#define _ASM_ARG3 _ASM_CX + +#define _ASM_ARG1L eax +#define _ASM_ARG2L edx +#define _ASM_ARG3L ecx + +#define _ASM_ARG1W ax +#define _ASM_ARG2W dx +#define _ASM_ARG3W cx + +#define _ASM_ARG1B al +#define _ASM_ARG2B dl +#define _ASM_ARG3B cl + +#else +/* 64 bit */ + +#define _ASM_ARG1 _ASM_DI +#define _ASM_ARG2 _ASM_SI +#define _ASM_ARG3 _ASM_DX +#define _ASM_ARG4 _ASM_CX +#define _ASM_ARG5 r8 +#define _ASM_ARG6 r9 + +#define _ASM_ARG1Q rdi +#define _ASM_ARG2Q rsi +#define _ASM_ARG3Q rdx +#define _ASM_ARG4Q rcx +#define _ASM_ARG5Q r8 +#define _ASM_ARG6Q r9 + +#define _ASM_ARG1L edi +#define _ASM_ARG2L esi +#define _ASM_ARG3L edx +#define _ASM_ARG4L ecx +#define _ASM_ARG5L r8d +#define _ASM_ARG6L r9d + +#define _ASM_ARG1W di +#define _ASM_ARG2W si +#define _ASM_ARG3W dx +#define _ASM_ARG4W cx +#define _ASM_ARG5W r8w +#define _ASM_ARG6W r9w + +#define _ASM_ARG1B dil +#define _ASM_ARG2B sil +#define _ASM_ARG3B dl +#define _ASM_ARG4B cl +#define _ASM_ARG5B r8b +#define _ASM_ARG6B r9b + +#endif + /* * Macros to generate condition code outputs from inline assembly, * The output operand must be type "bool". -- 2.14.4