From patchwork Wed Apr 3 23:34:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 2389601 Return-Path: X-Original-To: patchwork-linux-kbuild@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 1BE5F3FC71 for ; Wed, 3 Apr 2013 23:35:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1762486Ab3DCXfl (ORCPT ); Wed, 3 Apr 2013 19:35:41 -0400 Received: from avon.wwwdotorg.org ([70.85.31.133]:58692 "EHLO avon.wwwdotorg.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932158Ab3DCXfR (ORCPT ); Wed, 3 Apr 2013 19:35:17 -0400 Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id BC6A66506; Wed, 3 Apr 2013 17:36:00 -0600 (MDT) Received: from swarren-lx1.nvidia.com (localhost [127.0.0.1]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id 88C41E40F4; Wed, 3 Apr 2013 17:35:15 -0600 (MDT) From: Stephen Warren To: Michal Marek , Grant Likely , Rob Herring Cc: arm@kernel.org, Shawn Guo , Hiroshi Doyu , linux-kbuild@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Stephen Warren Subject: [PATCH V2 7/7] ARM: dt: create a DT header for the GIC Date: Wed, 3 Apr 2013 17:34:58 -0600 Message-Id: <1365032098-22825-7-git-send-email-swarren@wwwdotorg.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1365032098-22825-1-git-send-email-swarren@wwwdotorg.org> References: <1365032098-22825-1-git-send-email-swarren@wwwdotorg.org> X-NVConfidentiality: public X-Virus-Scanned: clamav-milter 0.96.5 at avon.wwwdotorg.org X-Virus-Status: Clean Sender: linux-kbuild-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kbuild@vger.kernel.org From: Stephen Warren The ARM GIC binding defines a few custom cells and flags for its IRQ specifier. Provide names for those. Signed-off-by: Stephen Warren --- v2: No change. v1: Moved header. Added include guard. (this patch was previously posted separately, hence there are changes in v1!) --- include/dt-bindings/interrupt-controller/arm-gic.h | 22 ++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 include/dt-bindings/interrupt-controller/arm-gic.h diff --git a/include/dt-bindings/interrupt-controller/arm-gic.h b/include/dt-bindings/interrupt-controller/arm-gic.h new file mode 100644 index 0000000..1ea1b70 --- /dev/null +++ b/include/dt-bindings/interrupt-controller/arm-gic.h @@ -0,0 +1,22 @@ +/* + * This header provides constants for the ARM GIC. + */ + +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H + +#include + +/* interrupt specific cell 0 */ + +#define GIC_SPI 0 +#define GIC_PPI 1 + +/* + * Interrupt specifier cell 2. + * The flaggs in irq.h are valid, plus those below. + */ +#define GIC_CPU_MASK_RAW(x) ((x) << 8) +#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1) + +#endif