| Message ID | 20230117134139.1298-4-nipun.gupta@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | add support for CDX bus | expand |
On 17/01/2023 14:41, Nipun Gupta wrote: > Add device tree bindings for CDX bus controller. Subject: drop second/last, redundant "device tree bindings". The "dt-bindings" prefix is already stating that these are bindings. > > Signed-off-by: Nipun Gupta <nipun.gupta@amd.com> > --- > .../bindings/bus/xlnx,cdxbus-controller.yaml | 68 +++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/bus/xlnx,cdxbus-controller.yaml > > diff --git a/Documentation/devicetree/bindings/bus/xlnx,cdxbus-controller.yaml b/Documentation/devicetree/bindings/bus/xlnx,cdxbus-controller.yaml > new file mode 100644 > index 000000000000..b2f186864021 > --- /dev/null > +++ b/Documentation/devicetree/bindings/bus/xlnx,cdxbus-controller.yaml > @@ -0,0 +1,68 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/bus/xlnx,cdxbus-controller.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: AMD CDX bus controller > + > +description: | > + CDX bus controller for AMD devices is implemented to dynamically > + detect CDX bus and devices on these bus using the firmware. > + The CDX bus manages multiple FPGA based hardware devices, which > + can support network, crypto or any other specialized type of > + devices. These FPGA based devices can be added/modified dynamically > + on run-time. > + > + All devices on the CDX bus will have a unique streamid (for IOMMU) > + and a unique device ID (for MSI) corresponding to a requestor ID > + (one to one associated with the device). The streamid and deviceid > + are used to configure SMMU and GIC-ITS respectively. > + > + iommu-map property is used to define the set of stream ids > + corresponding to each device and the associated IOMMU. > + > + The MSI writes are accompanied by sideband data (Device ID). > + The msi-map property is used to associate the devices with the > + device ID as well as the associated ITS controller. > + > + rproc property (xlnx,rproc) is used to identify the remote processor > + with which APU (Application Processor Unit) interacts to find out > + the bus and device configuration. > + > +maintainers: > + - Nipun Gupta <nipun.gupta@amd.com> > + - Nikhil Agarwal <nikhil.agarwal@amd.com> > + > +properties: > + compatible: > + const: xlnx,cdxbus-controller This misses SoC specific compatible. Drop "bus" - redundant. I would also say - drop controller - do you see any other devices with such compatible naming? Use naming consistent with other devices in the kernel. Just open some controllers - SPI, I2C etc. and look there. > + > + iommu-map: true No mask? > + > + msi-map: true > + > + xlnx,rproc: > + $ref: /schemas/types.yaml#/definitions/phandle > + description: > + phandle to the remoteproc_r5 rproc node using which APU interacts > + with remote processor. > + > +required: > + - compatible > + - iommu-map > + - msi-map > + - xlnx,rproc > + > +additionalProperties: false > + > +examples: > + - | > + cdxbus-controller { Node names should be generic, so just cdx. https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation > + compatible = "xlnx,cdxbus-controller"; > + /* define map for RIDs 250-259 */ > + iommu-map = <250 &smmu 250 10>; Best regards, Krzysztof
[AMD Official Use Only - General] > -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Sent: Tuesday, January 17, 2023 11:24 PM > To: Gupta, Nipun <Nipun.Gupta@amd.com>; robh+dt@kernel.org; > krzysztof.kozlowski+dt@linaro.org; gregkh@linuxfoundation.org; > rafael@kernel.org; eric.auger@redhat.com; alex.williamson@redhat.com; > cohuck@redhat.com; song.bao.hua@hisilicon.com; > mchehab+huawei@kernel.org; maz@kernel.org; f.fainelli@gmail.com; > jeffrey.l.hugo@gmail.com; saravanak@google.com; Michael.Srba@seznam.cz; > mani@kernel.org; yishaih@nvidia.com; jgg@ziepe.ca; jgg@nvidia.com; > robin.murphy@arm.com; will@kernel.org; joro@8bytes.org; > masahiroy@kernel.org; ndesaulniers@google.com; linux-arm- > kernel@lists.infradead.org; linux-kbuild@vger.kernel.org; linux- > kernel@vger.kernel.org; devicetree@vger.kernel.org > Cc: okaya@kernel.org; Anand, Harpreet <harpreet.anand@amd.com>; Agarwal, > Nikhil <nikhil.agarwal@amd.com>; Simek, Michal <michal.simek@amd.com>; > git (AMD-Xilinx) <git@amd.com> > Subject: Re: [PATCH 03/19] dt-bindings: bus: add CDX bus controller device tree > bindings > > Caution: This message originated from an External Source. Use proper caution > when opening attachments, clicking links, or responding. > > > On 17/01/2023 14:41, Nipun Gupta wrote: > > Add device tree bindings for CDX bus controller. > > Subject: drop second/last, redundant "device tree bindings". The > "dt-bindings" prefix is already stating that these are bindings. Agree. Will update. > > > > > Signed-off-by: Nipun Gupta <nipun.gupta@amd.com> > > --- > > .../bindings/bus/xlnx,cdxbus-controller.yaml | 68 +++++++++++++++++++ > > MAINTAINERS | 1 + > > 2 files changed, 69 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/bus/xlnx,cdxbus- > controller.yaml > > > > diff --git a/Documentation/devicetree/bindings/bus/xlnx,cdxbus- > controller.yaml b/Documentation/devicetree/bindings/bus/xlnx,cdxbus- > controller.yaml > > new file mode 100644 > > index 000000000000..b2f186864021 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/bus/xlnx,cdxbus-controller.yaml > > @@ -0,0 +1,68 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/bus/xlnx,cdxbus-controller.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: AMD CDX bus controller > > + > > +description: | > > + CDX bus controller for AMD devices is implemented to dynamically > > + detect CDX bus and devices on these bus using the firmware. > > + The CDX bus manages multiple FPGA based hardware devices, which > > + can support network, crypto or any other specialized type of > > + devices. These FPGA based devices can be added/modified dynamically > > + on run-time. > > + > > + All devices on the CDX bus will have a unique streamid (for IOMMU) > > + and a unique device ID (for MSI) corresponding to a requestor ID > > + (one to one associated with the device). The streamid and deviceid > > + are used to configure SMMU and GIC-ITS respectively. > > + > > + iommu-map property is used to define the set of stream ids > > + corresponding to each device and the associated IOMMU. > > + > > + The MSI writes are accompanied by sideband data (Device ID). > > + The msi-map property is used to associate the devices with the > > + device ID as well as the associated ITS controller. > > + > > + rproc property (xlnx,rproc) is used to identify the remote processor > > + with which APU (Application Processor Unit) interacts to find out > > + the bus and device configuration. > > + > > +maintainers: > > + - Nipun Gupta <nipun.gupta@amd.com> > > + - Nikhil Agarwal <nikhil.agarwal@amd.com> > > + > > +properties: > > + compatible: > > + const: xlnx,cdxbus-controller > > This misses SoC specific compatible. Drop "bus" - redundant. I would > also say - drop controller - do you see any other devices with such > compatible naming? Use naming consistent with other devices in the > kernel. Just open some controllers - SPI, I2C etc. and look there. Makes sense. Will use "xlnx,cdx" in compatible. > > > + > > + iommu-map: true > > No mask? Currently there is no use for iommu-map-mask as RID's are one to one mapped stream ID's, so we have not added this optional property. > > > + > > + msi-map: true > > + > > + xlnx,rproc: > > + $ref: /schemas/types.yaml#/definitions/phandle > > + description: > > + phandle to the remoteproc_r5 rproc node using which APU interacts > > + with remote processor. > > + > > +required: > > + - compatible > > + - iommu-map > > + - msi-map > > + - xlnx,rproc > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + cdxbus-controller { > > Node names should be generic, so just cdx. > https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree- > basics.html#generic-names-recommendation Sure. Will update to cdx. Thanks, Nipun > > > + compatible = "xlnx,cdxbus-controller"; > > + /* define map for RIDs 250-259 */ > > + iommu-map = <250 &smmu 250 10>; > > Best regards, > Krzysztof
On 18/01/2023 13:39, Gupta, Nipun wrote: > [AMD Official Use Only - General] Fix your email client. This is not helping us. What shall I do with it? > > > (...) >>> +properties: >>> + compatible: >>> + const: xlnx,cdxbus-controller >> >> This misses SoC specific compatible. Drop "bus" - redundant. I would >> also say - drop controller - do you see any other devices with such >> compatible naming? Use naming consistent with other devices in the >> kernel. Just open some controllers - SPI, I2C etc. and look there. > > Makes sense. Will use "xlnx,cdx" in compatible. No, this still misses device specific compatible. You did ignored half of my comment now. Best regards, Krzysztof
> -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Sent: Wednesday, January 18, 2023 6:13 PM > To: Gupta, Nipun <Nipun.Gupta@amd.com>; robh+dt@kernel.org; > krzysztof.kozlowski+dt@linaro.org; gregkh@linuxfoundation.org; > rafael@kernel.org; eric.auger@redhat.com; alex.williamson@redhat.com; > cohuck@redhat.com; song.bao.hua@hisilicon.com; > mchehab+huawei@kernel.org; maz@kernel.org; f.fainelli@gmail.com; > jeffrey.l.hugo@gmail.com; saravanak@google.com; Michael.Srba@seznam.cz; > mani@kernel.org; yishaih@nvidia.com; jgg@ziepe.ca; jgg@nvidia.com; > robin.murphy@arm.com; will@kernel.org; joro@8bytes.org; > masahiroy@kernel.org; ndesaulniers@google.com; linux-arm- > kernel@lists.infradead.org; linux-kbuild@vger.kernel.org; linux- > kernel@vger.kernel.org; devicetree@vger.kernel.org > Cc: okaya@kernel.org; Anand, Harpreet <harpreet.anand@amd.com>; Agarwal, > Nikhil <nikhil.agarwal@amd.com>; Simek, Michal <michal.simek@amd.com>; > git (AMD-Xilinx) <git@amd.com> > Subject: Re: [PATCH 03/19] dt-bindings: bus: add CDX bus controller device tree > bindings (...) > >>> +properties: > >>> + compatible: > >>> + const: xlnx,cdxbus-controller > >> > >> This misses SoC specific compatible. Drop "bus" - redundant. I would > >> also say - drop controller - do you see any other devices with such > >> compatible naming? Use naming consistent with other devices in the > >> kernel. Just open some controllers - SPI, I2C etc. and look there. > > > > Makes sense. Will use "xlnx,cdx" in compatible. > > No, this still misses device specific compatible. You did ignored half > of my comment now. Sorry I missed that part. Will rename this to "xlnx,versal-cdx". Thanks, Nipun > > > Best regards, > Krzysztof
diff --git a/Documentation/devicetree/bindings/bus/xlnx,cdxbus-controller.yaml b/Documentation/devicetree/bindings/bus/xlnx,cdxbus-controller.yaml new file mode 100644 index 000000000000..b2f186864021 --- /dev/null +++ b/Documentation/devicetree/bindings/bus/xlnx,cdxbus-controller.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/xlnx,cdxbus-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AMD CDX bus controller + +description: | + CDX bus controller for AMD devices is implemented to dynamically + detect CDX bus and devices on these bus using the firmware. + The CDX bus manages multiple FPGA based hardware devices, which + can support network, crypto or any other specialized type of + devices. These FPGA based devices can be added/modified dynamically + on run-time. + + All devices on the CDX bus will have a unique streamid (for IOMMU) + and a unique device ID (for MSI) corresponding to a requestor ID + (one to one associated with the device). The streamid and deviceid + are used to configure SMMU and GIC-ITS respectively. + + iommu-map property is used to define the set of stream ids + corresponding to each device and the associated IOMMU. + + The MSI writes are accompanied by sideband data (Device ID). + The msi-map property is used to associate the devices with the + device ID as well as the associated ITS controller. + + rproc property (xlnx,rproc) is used to identify the remote processor + with which APU (Application Processor Unit) interacts to find out + the bus and device configuration. + +maintainers: + - Nipun Gupta <nipun.gupta@amd.com> + - Nikhil Agarwal <nikhil.agarwal@amd.com> + +properties: + compatible: + const: xlnx,cdxbus-controller + + iommu-map: true + + msi-map: true + + xlnx,rproc: + $ref: /schemas/types.yaml#/definitions/phandle + description: + phandle to the remoteproc_r5 rproc node using which APU interacts + with remote processor. + +required: + - compatible + - iommu-map + - msi-map + - xlnx,rproc + +additionalProperties: false + +examples: + - | + cdxbus-controller { + compatible = "xlnx,cdxbus-controller"; + /* define map for RIDs 250-259 */ + iommu-map = <250 &smmu 250 10>; + /* define msi map for RIDs 250-259 */ + msi-map = <250 &its 250 10>; + xlnx,rproc = <&remoteproc_r5>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 25c76cf27f21..b43242546b17 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -966,6 +966,7 @@ AMD CDX BUS DRIVER M: Nipun Gupta <nipun.gupta@amd.com> M: Nikhil Agarwal <nikhil.agarwal@amd.com> S: Maintained +F: Documentation/devicetree/bindings/bus/xlnx,cdxbus-controller.yaml F: drivers/bus/cdx/* F: include/linux/cdx/*
Add device tree bindings for CDX bus controller. Signed-off-by: Nipun Gupta <nipun.gupta@amd.com> --- .../bindings/bus/xlnx,cdxbus-controller.yaml | 68 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/xlnx,cdxbus-controller.yaml