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Wed, 9 Oct 2024 09:38:54 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , Subject: [PATCH v3 00/16] cover-letter: iommufd: Add vIOMMU infrastructure (Part-2: vDEVICE) Date: Wed, 9 Oct 2024 09:38:12 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003F62:EE_|SJ0PR12MB5663:EE_ X-MS-Office365-Filtering-Correlation-Id: d34375fd-701e-4d63-e3e3-08dce880e209 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|1800799024|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: Kb+1wVbKGNiqWr9dZaUAHGN7U1ITCLI+h5bDKmBGTZZuNB/kMo35E4Lsd7MDwbJkJiq0AcD2GBf2+2TZND/WqR0VqZALFypbh2T63b9WXUSmmAvPcXIQ+6a46BnvR0nwhg4U+gQ+moxTsKO9RheKmqMFFJzYZbX0t7RmhTpQz9MVLu5kIdWIQafssqDpH8V/rpK0djYZuRSfOBXU2JMjX38r4aEYyxt8W9KQG/o4sjbOhN2G1hYtk6Fh8CwfaGDg2SZvJMhCN4S45fEf+VO9WdxKdJOJpzPadrEgYcTdKOhyc6jXx9VgC1kD/BM12KUW5uV00cnazc/3C4oAIhlQqoEsgi77Y+Da1N/jaJXF47DaNCQHeUgmubEVb9mKijyy3olFoDnR9qd+QsgIPRIUyT3Pc0ruU0SJoVGxwAAiCk5w9KYIr3e4wVyt+HWJj+/rKxbyETh4n8rXeH3JtWDumMMD8WV2DyCbLzpkn/olb2X8unfycJ4ud2GVC7Fg7i/uWvJA8H4dbcvIc8g2C04PPMKdbA3VpBmhQRg7PvD2tNg1h+m8PvW8ANTxYQJo7LPEJ4DoY4xmHXX34Lpa9kKynvCgpVfbM2TtnRAIPdelp826Yu0Kekp8aSmpKzyKfcuLi/YzSgpWJ9oJXnK1UuZhUZ6MjsXNZpDrgBcWJB6oKJ0ipVNak/GjonXeDdQv1KOpLI3e0d7oVHyzeKCac9+W7A8TiWkaetqCx8zfYzxMOpGBs56hSqMRLudiUzOatorC0Lonrc6RFW9sXJ4kuv6pN0+IN9kmdS1/Rg/fAC+WORnpiqy4zkdIBIYiJ65oOiYu63+4m7Kyu2e3rVXBy5UpuBkSRMtR1GvevI/O4tqUhfWbgrFQPL5+TJ8MxiQ/wWSr5HDCO5+X5RkOlmJejG2oPbcMKCcpxkfd1LV0aKFkDH5b3bsm2dxGM3RyKCvPjW1rf3FlUhmZaNFfTaeUjz4f3TJIQvVG1FSccEYZFlnnFbKT88gjv2m6tjizuc4DdC7iGUT3/ET72O/JNg2ekgRC19xaH17KQyDxlw2GNdmlC+OrfsziLGcrs52FZT0dsibJQMIb8IosEeww314dCyFnaBWIo79Lo2f7airnE1/8qRkfsZkM/MQjTI3N5HDU0jfWEUICRYcBhFb/rl5909TmDSQV3BDj/AAzxdjFd5P/gy5qPNb/C6hb3FCQxT15DJay1+ra1wdieSW1XFXt0VPqQFYVsDCiVMzfo1XlhuZkYInqUlBcUpdZw1VEJcROAb8h15WfJDJ4MAIxMw8gR9Djb1K3DkBT3oesMpNFhLO/obntUOHkttFGBIYI8BemjoTUbTopwbGBclafKzzMMcHHfkomkD9eSMzl7UEyM/DI1cyTmJj5OSZPHHN5HVwIotEE X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(1800799024)(376014)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Oct 2024 16:39:02.3962 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d34375fd-701e-4d63-e3e3-08dce880e209 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F62.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB5663 Following the previous vIOMMU series, this adds another vDEVICE structure, representing the association from an iommufd_device to an iommufd_viommu. This gives the whole architecture a new "v" layer: _______________________________________________________________________ | iommufd (with vIOMMU/vDEVICE) | | _____________ _____________ | | | | | | | | |----------------| vIOMMU |<---| vDEVICE |<------| | | | | | |_____________| | | | | ______ | | _____________ ___|____ | | | | | | | | | | | | | | | IOAS |<---|(HWPT_PAGING)|<---| HWPT_NESTED |<--| DEVICE | | | | |______| |_____________| |_____________| |________| | |______|________|______________|__________________|_______________|_____| | | | | | ______v_____ | ______v_____ ______v_____ ___v__ | struct | | PFN | (paging) | | (nested) | |struct| |iommu_device| |------>|iommu_domain|<----|iommu_domain|<----|device| |____________| storage|____________| |____________| |______| This vDEVICE object is used to collect and store all vIOMMU-related device information/attributes in a VM. As an initial series for vDEVICE, add only the virt_id to the vDEVICE, which is a vIOMMU specific device ID in a VM: e.g. vSID of ARM SMMUv3, vDeviceID of AMD IOMMU, and vID of Intel VT-d to a Context Table. This virt_id helps IOMMU drivers to link the vID to a pID of the device against the physical IOMMU instance. This is essential for a vIOMMU-based invalidation, where the request contains a device's vID for a device cache flush, e.g. ATC invalidation. Therefore, with this vDEVICE object, support a vIOMMU-based invalidation, by reusing IOMMUFD_CMD_HWPT_INVALIDATE for a vIOMMU object to flush cache with a given driver data. As for the implementation of the series, add driver support in ARM SMMUv3 for a real world use case. This series is on Github: https://github.com/nicolinc/iommufd/commits/iommufd_viommu_p2-v3 Paring QEMU branch for testing: https://github.com/nicolinc/qemu/commits/wip/for_iommufd_viommu_p2-v3 Changelog v3 * Added Jason's Reviewed-by * Split this invalidation part out of the part-1 series * Repurposed VDEV_ID ioctl to a wider vDEVICE structure and ioctl * Reduced viommu_api functions by allowing drivers to access viommu and vdevice structure directly * Dropped vdevs_rwsem by using xa_lock instead * Dropped arm_smmu_cache_invalidate_user v2 https://lore.kernel.org/all/cover.1724776335.git.nicolinc@nvidia.com/ * Limited vdev_id to one per idev * Added a rw_sem to protect the vdev_id list * Reworked driver-level APIs with proper lockings * Added a new viommu_api file for IOMMUFD_DRIVER config * Dropped useless iommu_dev point from the viommu structure * Added missing index numnbers to new types in the uAPI header * Dropped IOMMU_VIOMMU_INVALIDATE uAPI; Instead, reuse the HWPT one * Reworked mock_viommu_cache_invalidate() using the new iommu helper * Reordered details of set/unset_vdev_id handlers for proper lockings v1 https://lore.kernel.org/all/cover.1723061377.git.nicolinc@nvidia.com/ Thanks! Nicolin Jason Gunthorpe (3): iommu: Add iommu_copy_struct_from_full_user_array helper iommu/arm-smmu-v3: Allow ATS for IOMMU_DOMAIN_NESTED iommu/arm-smmu-v3: Update comments about ATS and bypass Nicolin Chen (13): iommufd/viommu: Introduce IOMMUFD_OBJ_VDEVICE and its related struct iommufd/viommu: Add a default_viommu_ops for IOMMU_VIOMMU_TYPE_DEFAULT iommufd/viommu: Add IOMMU_VDEVICE_ALLOC ioctl iommufd/selftest: Add IOMMU_VDEVICE_ALLOC test coverage iommu/viommu: Add cache_invalidate for IOMMU_VIOMMU_TYPE_DEFAULT iommufd/hw_pagetable: Allow viommu->ops->cache_invalidate for hwpt_nested iommufd: Allow hwpt_id to carry viommu_id for IOMMU_HWPT_INVALIDATE iommufd/viommu: Add vdev_to_dev helper iommufd/selftest: Add mock_viommu_cache_invalidate iommufd/selftest: Add IOMMU_TEST_OP_DEV_CHECK_CACHE test command iommufd/selftest: Add vIOMMU coverage for IOMMU_HWPT_INVALIDATE ioctl Documentation: userspace-api: iommufd: Update vDEVICE iommu/arm-smmu-v3: Add arm_vsmmu_cache_invalidate drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 9 +- drivers/iommu/iommufd/iommufd_private.h | 12 ++ drivers/iommu/iommufd/iommufd_test.h | 30 +++ include/linux/iommu.h | 53 ++++- include/linux/iommufd.h | 50 +++++ include/uapi/linux/iommufd.h | 61 +++++- tools/testing/selftests/iommu/iommufd_utils.h | 83 +++++++ .../arm/arm-smmu-v3/arm-smmu-v3-iommufd.c | 162 +++++++++++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 50 +++-- drivers/iommu/iommufd/hw_pagetable.c | 45 +++- drivers/iommu/iommufd/main.c | 6 + drivers/iommu/iommufd/selftest.c | 122 ++++++++++- drivers/iommu/iommufd/viommu.c | 93 +++++++- drivers/iommu/iommufd/viommu_api.c | 21 ++ tools/testing/selftests/iommu/iommufd.c | 204 +++++++++++++++++- Documentation/userspace-api/iommufd.rst | 58 +++-- 16 files changed, 1007 insertions(+), 52 deletions(-)