diff mbox series

[v3,01/15] iommu: Add IOMMU_CAP_ENFORCE_CACHE_COHERENCY

Message ID 1-v3-402a7d6459de+24b-iommufd_jgg@nvidia.com (mailing list archive)
State New
Headers show
Series IOMMUFD Generic interface | expand

Commit Message

Jason Gunthorpe Oct. 25, 2022, 6:12 p.m. UTC
This queries if a domain linked to a device should expect to support
enforce_cache_coherency() so iommufd can negotiate the rules for when a
domain should be shared or not.

For iommufd a device that declares IOMMU_CAP_ENFORCE_CACHE_COHERENCY will
not be attached to a domain that does not support it.

Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
---
 drivers/iommu/amd/iommu.c   | 2 ++
 drivers/iommu/intel/iommu.c | 4 ++++
 include/linux/iommu.h       | 5 +++++
 3 files changed, 11 insertions(+)

Comments

Baolu Lu Oct. 26, 2022, 12:45 p.m. UTC | #1
On 2022/10/26 2:12, Jason Gunthorpe wrote:
> This queries if a domain linked to a device should expect to support
> enforce_cache_coherency() so iommufd can negotiate the rules for when a
> domain should be shared or not.
> 
> For iommufd a device that declares IOMMU_CAP_ENFORCE_CACHE_COHERENCY will
> not be attached to a domain that does not support it.
> 
> Signed-off-by: Jason Gunthorpe<jgg@nvidia.com>

Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com>

Best regards,
baolu
Tian, Kevin Nov. 3, 2022, 5:03 a.m. UTC | #2
> From: Jason Gunthorpe <jgg@nvidia.com>
> Sent: Wednesday, October 26, 2022 2:12 AM
> 
> This queries if a domain linked to a device should expect to support
> enforce_cache_coherency() so iommufd can negotiate the rules for when a
> domain should be shared or not.
> 
> For iommufd a device that declares
> IOMMU_CAP_ENFORCE_CACHE_COHERENCY will
> not be attached to a domain that does not support it.
> 
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>

Reviewed-by: Kevin Tian <kevin.tian@intel.com>, with one nit

> @@ -4458,7 +4458,11 @@ static bool intel_iommu_capable(struct device
> *dev, enum iommu_cap cap)
>  		return irq_remapping_enabled == 1;
>  	if (cap == IOMMU_CAP_PRE_BOOT_PROTECTION)
>  		return dmar_platform_optin();
> +	if (cap == IOMMU_CAP_ENFORCE_CACHE_COHERENCY) {
> +		struct device_domain_info *info = dev_iommu_priv_get(dev);
> 
> +		return ecap_sc_support(info->iommu->ecap);
> +	}
>  	return false;
>  }

use switch/case while making this change.
Jason Gunthorpe Nov. 4, 2022, 7:25 p.m. UTC | #3
On Thu, Nov 03, 2022 at 05:03:01AM +0000, Tian, Kevin wrote:
> > @@ -4458,7 +4458,11 @@ static bool intel_iommu_capable(struct device
> > *dev, enum iommu_cap cap)
> >  		return irq_remapping_enabled == 1;
> >  	if (cap == IOMMU_CAP_PRE_BOOT_PROTECTION)
> >  		return dmar_platform_optin();
> > +	if (cap == IOMMU_CAP_ENFORCE_CACHE_COHERENCY) {
> > +		struct device_domain_info *info = dev_iommu_priv_get(dev);
> > 
> > +		return ecap_sc_support(info->iommu->ecap);
> > +	}
> >  	return false;
> >  }
> 
> use switch/case while making this change.

Done:

static bool intel_iommu_capable(struct device *dev, enum iommu_cap cap)
{
	struct device_domain_info *info = dev_iommu_priv_get(dev);

	switch (cap) {
	case IOMMU_CAP_CACHE_COHERENCY:
		return true;
	case IOMMU_CAP_INTR_REMAP:
		return irq_remapping_enabled == 1;
	case IOMMU_CAP_PRE_BOOT_PROTECTION:
		return dmar_platform_optin();
	case IOMMU_CAP_ENFORCE_CACHE_COHERENCY:
		return ecap_sc_support(info->iommu->ecap);
	default:
		return false;
	}
}

Thanks,
Jason
diff mbox series

Patch

diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index d3b39d0416fa32..d0802cab2a2f0c 100644
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -2286,6 +2286,8 @@  static bool amd_iommu_capable(struct device *dev, enum iommu_cap cap)
 		return false;
 	case IOMMU_CAP_PRE_BOOT_PROTECTION:
 		return amdr_ivrs_remap_support;
+	case IOMMU_CAP_ENFORCE_CACHE_COHERENCY:
+		return true;
 	default:
 		break;
 	}
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 48cdcd0a5cf346..438ba997fa230e 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -4458,7 +4458,11 @@  static bool intel_iommu_capable(struct device *dev, enum iommu_cap cap)
 		return irq_remapping_enabled == 1;
 	if (cap == IOMMU_CAP_PRE_BOOT_PROTECTION)
 		return dmar_platform_optin();
+	if (cap == IOMMU_CAP_ENFORCE_CACHE_COHERENCY) {
+		struct device_domain_info *info = dev_iommu_priv_get(dev);
 
+		return ecap_sc_support(info->iommu->ecap);
+	}
 	return false;
 }
 
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 3c9da1f8979e3a..40cf2d8393465f 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -108,6 +108,11 @@  enum iommu_cap {
 	IOMMU_CAP_NOEXEC,		/* IOMMU_NOEXEC flag */
 	IOMMU_CAP_PRE_BOOT_PROTECTION,	/* Firmware says it used the IOMMU for
 					   DMA protection and we should too */
+	/*
+	 * Per-device flag indicating if enforce_cache_coherency() will work on
+	 * this device.
+	 */
+	IOMMU_CAP_ENFORCE_CACHE_COHERENCY,
 };
 
 /* These are the possible reserved region types */