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Fri, 10 Jan 2025 19:33:12 -0800 From: Nicolin Chen To: , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH RFCv2 11/13] iommufd/device: Allow setting IOVAs for MSI(x) vectors Date: Fri, 10 Jan 2025 19:32:27 -0800 Message-ID: <1ef64bea7c025edf11867a94dad996f0f5398d63.1736550979.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0001709B:EE_|DS0PR12MB7510:EE_ X-MS-Office365-Filtering-Correlation-Id: 3fb26e94-2893-4524-2973-08dd31f0b6ff X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|7416014|1800799024|376014; X-Microsoft-Antispam-Message-Info: o2Xk7nonwwB0ekZIFILp32NMPL7coljD4aV2shpllldlVdohn5QMOUtiW9EM4lyR3Du+Kdgk8EaOxhXRkKhoYpuWibFOoF9VPjNuN8DBdBhnpVuz8UsJ2NTPuZLiBFlX8DMr4NGyy7tSqbFj5Q0Hl+JaiYnLK8umN6oKVWFYB9kaDmXhQ7E7p0zMKT66efcuo3rA5hii8/6lR6y6faYyfsXclcJffc13k9Ded/NRb0tyaghCCV6BQ9ciLzM+D07Fuu2iTG5cUyGVpOLEVisLIveXv7zpvpGJPOkPi7Zhmz2OVnHR63UN0GSpLWnxoDNoDB/NtQJ2D+UKk0aKNb5SAbDwz5tM/FVEK5tS27B6AcfY51q7VflyT45lek5N1jnN+Bc4OcrBvSkhWqylw/cY86SevEXOdJ1a+Pk+t9BAv6n9dtrw5GrKGXffjaJzycg2isFumy4cbWGswh00PYKQ8vkXt/piuXk7c9GQi90Upct9eBD89GF3lbomSjZTy3rEMkcShmL8B9Mh4nSOz3frISaMsFBtgSLDlVtpV6RhaBi/SB9ujvwOY2lWCf1cTkRkRcxIlLwHgiV2loH24xGFcHEmzik5DIDxhoKVjO/v955YeG+wIsVPcBz820mzKRG3hncTyep5MKTRwLVmmMhrN0mnSTTOafssDnJmN0EyHGYydTOzsB+pG2QWShP5xSvXi15XygiJAKggSJvPDlOeP3EYpafMat93KaiNdth7AVl6cCXx4Ls3gkWfJoz0ex5adg7uae5aqXSKARZbJO+8XSN7S9AAcbNRCvexqZoOj29DbToArKIxlPjlB9fKT3qCZA95mmgnlHCc5LbIl+TmLt+MDXVX5XQJPiYdKQ7Gcz0PdIKyNMnxte1EZwI5amKwtR3VcS/FpvMNXIGp8M9gCoqn6IchWG6Hb3vB765smLCn8h4puJspB5wMr4nr5M5Kjid5H7q9xh7qGfOIHJ4issQcBnirvwy2eOfbSq3wJfZ8SMqsVP5bVtzXGcO5RXsu46tiSUqUYUoevVuakcIPWT4zHBpfw6RjCU8bOEa5rmKsMoTk8J3KaTsQ08H4HM6wvYUJmWEiEDKoqkS9XmKo+mOjM6gUE0KV7KS68eg2yrKwEt8UdZBoSrkVpbiIXXEdhgAbw6m57XqhQV8b6BnUyVIpqtt6a5EwOhMUotIpcbx1Xa1M+l2ruC7fYeycvo/hgGDdZrr3bWt+8ZoknIMvGjsEfh8WlkEiZUiQiZsViph+xNc9thXaQ2jsOgoddiwYQw3j5/Zo86JzLWhCF8pT6TpkqADlA3+vUXqheLWZFWcYrhzGMOUbFuOEDV4kB2+vo1MZhThLPUPsTWBzKBBCJTwuGOAw2bDSwdXyTj8wTA3Gv2VxG7BIvFuESUMJFTdS1L/iv98q2Yptg2BgL8f00v2oMy5kZ0TFkFIiE0JNFOZDgl/Xf+/V3VNgCUuYg+BDg34fJLhFHM0xp6xhC7PLpmcw0s0ll+shS1BgSCEgAeY= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(7416014)(1800799024)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Jan 2025 03:33:28.7159 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3fb26e94-2893-4524-2973-08dd31f0b6ff X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0001709B.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7510 Add a resizable array "msi_iovas" to store the user space IOVAs for its vMSI(x) vectors. And use the corresponding IOVA for set the msi_desc in the iommufd_sw_msi(). This allows irqchip driver to program the correct MSI doorbell addresses (in case of requiring IOMMU translations). Provide a set of helpers to allocate/set/unset the resizable array. The next patch will call them from the vfio code. Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/iommufd_private.h | 2 ++ include/linux/iommufd.h | 6 ++++ drivers/iommu/iommufd/device.c | 47 ++++++++++++++++++++++++- 3 files changed, 54 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/iommufd/iommufd_private.h b/drivers/iommu/iommufd/iommufd_private.h index 9f071609f00b..81ff46d630dc 100644 --- a/drivers/iommu/iommufd/iommufd_private.h +++ b/drivers/iommu/iommufd/iommufd_private.h @@ -427,6 +427,8 @@ struct iommufd_device { /* protect iopf_enabled counter */ struct mutex iopf_lock; unsigned int iopf_enabled; + dma_addr_t *msi_iovas; + unsigned int num_msi_iovas; }; static inline struct iommufd_device * diff --git a/include/linux/iommufd.h b/include/linux/iommufd.h index 11110c749200..787dcdcb9b3b 100644 --- a/include/linux/iommufd.h +++ b/include/linux/iommufd.h @@ -58,6 +58,12 @@ void iommufd_device_detach(struct iommufd_device *idev); struct iommufd_ctx *iommufd_device_to_ictx(struct iommufd_device *idev); u32 iommufd_device_to_id(struct iommufd_device *idev); +int iommufd_device_set_num_msi_iovas(struct iommufd_device *idev, + unsigned int num); +int iommufd_device_set_msi_iova(struct iommufd_device *idev, unsigned int index, + dma_addr_t iova); +void iommufd_device_unset_msi_iova(struct iommufd_device *idev, + unsigned int index); struct iommufd_access_ops { u8 needs_pin_pages : 1; diff --git a/drivers/iommu/iommufd/device.c b/drivers/iommu/iommufd/device.c index 093a3bd798db..3d16967146cc 100644 --- a/drivers/iommu/iommufd/device.c +++ b/drivers/iommu/iommufd/device.c @@ -137,6 +137,8 @@ void iommufd_device_destroy(struct iommufd_object *obj) struct iommufd_device *idev = container_of(obj, struct iommufd_device, obj); + if (idev->num_msi_iovas) + kfree(idev->msi_iovas); iommu_device_release_dma_owner(idev->dev); iommufd_put_group(idev->igroup); if (!iommufd_selftest_is_mock_dev(idev->dev)) @@ -294,6 +296,45 @@ u32 iommufd_device_to_id(struct iommufd_device *idev) } EXPORT_SYMBOL_NS_GPL(iommufd_device_to_id, "IOMMUFD"); +int iommufd_device_set_num_msi_iovas(struct iommufd_device *idev, + unsigned int num) +{ + dma_addr_t *msi_iovas; + int i; + + msi_iovas = krealloc(idev->msi_iovas, sizeof(*idev->msi_iovas) * num, + GFP_KERNEL); + if (!msi_iovas) + return -ENOMEM; + + for (i = idev->num_msi_iovas; i < num; i++) + msi_iovas[i] = PHYS_ADDR_MAX; + + idev->msi_iovas = msi_iovas; + idev->num_msi_iovas = num; + return 0; +} +EXPORT_SYMBOL_NS_GPL(iommufd_device_set_num_msi_iovas, "IOMMUFD"); + +int iommufd_device_set_msi_iova(struct iommufd_device *idev, unsigned int index, + dma_addr_t iova) +{ + if (index >= idev->num_msi_iovas) + return -EINVAL; + idev->msi_iovas[index] = iova; + return 0; +} +EXPORT_SYMBOL_NS_GPL(iommufd_device_set_msi_iova, "IOMMUFD"); + +void iommufd_device_unset_msi_iova(struct iommufd_device *idev, + unsigned int index) +{ + if (index >= idev->num_msi_iovas) + return; + idev->msi_iovas[index] = PHYS_ADDR_MAX; +} +EXPORT_SYMBOL_NS_GPL(iommufd_device_unset_msi_iova, "IOMMUFD"); + /* * Get a iommufd_sw_msi_map for the msi physical address requested by the irq * layer. The mapping to IOVA is global to the iommufd file descriptor, every @@ -403,7 +444,11 @@ int iommufd_sw_msi(struct iommu_domain *domain, struct msi_desc *desc, return rc; set_bit(msi_map->id, handle->idev->igroup->required_sw_msi.bitmap); - iova = msi_map->sw_msi_start + msi_map->pgoff * PAGE_SIZE; + if (desc->msi_index < handle->idev->num_msi_iovas && + handle->idev->msi_iovas[desc->msi_index] != PHYS_ADDR_MAX) + iova = handle->idev->msi_iovas[desc->msi_index]; + else + iova = msi_map->sw_msi_start + msi_map->pgoff * PAGE_SIZE; msi_desc_set_iommu_msi_iova(desc, iova, PAGE_SHIFT); return 0; }