diff mbox series

[v1,2/6] kselftest/arm64: Add FEAT_CSSC to the hwcap selftest

Message ID 20221017152520.1039165-3-broonie@kernel.org (mailing list archive)
State Accepted
Commit b0ab73a5479fdf6b42babaccf22b4fa88f5a20a6
Headers show
Series arm64: Support for 2022 data processing instructions | expand

Commit Message

Mark Brown Oct. 17, 2022, 3:25 p.m. UTC
Add FEAT_CSSC to the set of features checked by the hwcap selftest.

Signed-off-by: Mark Brown <broonie@kernel.org>
---
 tools/testing/selftests/arm64/abi/hwcap.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Catalin Marinas Nov. 9, 2022, 5:30 p.m. UTC | #1
On Mon, Oct 17, 2022 at 04:25:16PM +0100, Mark Brown wrote:
> Add FEAT_CSSC to the set of features checked by the hwcap selftest.
> 
> Signed-off-by: Mark Brown <broonie@kernel.org>

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
diff mbox series

Patch

diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c
index 9f1a7b5c6193..c7a6b327a7d0 100644
--- a/tools/testing/selftests/arm64/abi/hwcap.c
+++ b/tools/testing/selftests/arm64/abi/hwcap.c
@@ -33,6 +33,12 @@ 
  */
 typedef void (*sigill_fn)(void);
 
+static void cssc_sigill(void)
+{
+	/* CNT x0, x0 */
+	asm volatile(".inst 0xdac01c00" : : : "x0");
+}
+
 static void rng_sigill(void)
 {
 	asm volatile("mrs x0, S3_3_C2_C4_0" : : : "x0");
@@ -118,6 +124,13 @@  static const struct hwcap_data {
 	sigill_fn sigill_fn;
 	bool sigill_reliable;
 } hwcaps[] = {
+	{
+		.name = "CSSC",
+		.at_hwcap = AT_HWCAP2,
+		.hwcap_bit = HWCAP2_CSSC,
+		.cpuinfo = "cssc",
+		.sigill_fn = cssc_sigill,
+	},
 	{
 		.name = "RNG",
 		.at_hwcap = AT_HWCAP2,