| Message ID | 20221208-arm64-sme2-v4-5-f2fa0aef982f@kernel.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 8ef55603b8eaf9362464b3197eb139baa4bd18b9 |
| Headers | show
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From: Mark Brown <broonie@kernel.org>
Date: Mon, 16 Jan 2023 16:04:40 +0000
Subject: [PATCH v4 05/21] arm64/esr: Document ISS for ZT0 being disabled
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|
| Series |
arm64/sme: Support SME 2 and SME 2.1
|
expand
|
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index 15b34fbfca66..5f3271e9d5df 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -341,6 +341,7 @@ #define ESR_ELx_SME_ISS_ILL 1 #define ESR_ELx_SME_ISS_SM_DISABLED 2 #define ESR_ELx_SME_ISS_ZA_DISABLED 3 +#define ESR_ELx_SME_ISS_ZT_DISABLED 4 #ifndef __ASSEMBLY__ #include <asm/types.h>
SME2 defines a new ISS code for use when trapping acesses to ZT0, add a definition for it. Signed-off-by: Mark Brown <broonie@kernel.org> --- arch/arm64/include/asm/esr.h | 1 + 1 file changed, 1 insertion(+)