@@ -15,6 +15,33 @@ static struct read_format rf_cqm;
static int fd_lm;
char llc_occup_path[1024];
+/*
+ * cache_alloc_size - Calculate slice size for given cache slice mask
+ * @cpu_no: CPU number
+ * @cache_type: Cache level L2/L3
+ * @slice_mask: Cache slice mask
+ * @slice_size: Slice size returned on success
+ *
+ * Returns: 0 on success with @slize_size filled, non-zero on error.
+ */
+int cache_alloc_size(int cpu_no, char *cache_type, unsigned long slice_mask,
+ unsigned long *slice_size)
+{
+ unsigned long cache_size, full_mask;
+ int ret;
+
+ ret = get_cbm_mask(cache_type, &full_mask);
+ if (ret)
+ return ret;
+
+ ret = get_cache_size(cpu_no, cache_type, &cache_size);
+ if (ret)
+ return ret;
+
+ *slice_size = cache_size * count_bits(slice_mask) / count_bits(full_mask);
+ return 0;
+}
+
static void initialize_perf_event_attr(void)
{
pea_llc_miss.type = PERF_TYPE_HARDWARE;
@@ -146,7 +146,9 @@ int cat_perf_miss_val(int cpu_no, int n, char *cache_type)
/* Set param values for parent thread which will be allocated bitmask
* with (max_bits - n) bits
*/
- param.span = cache_size * (count_of_bits - n) / count_of_bits;
+ ret = cache_alloc_size(cpu_no, cache_type, l_mask, ¶m.span);
+ if (ret)
+ return ret;
strcpy(param.ctrlgrp, "c2");
strcpy(param.mongrp, "m2");
strcpy(param.filename, RESULT_FILE_NAME2);
@@ -167,7 +169,9 @@ int cat_perf_miss_val(int cpu_no, int n, char *cache_type)
param.mask = l_mask_1;
strcpy(param.ctrlgrp, "c1");
strcpy(param.mongrp, "m1");
- param.span = cache_size * n / count_of_bits;
+ ret = cache_alloc_size(cpu_no, cache_type, l_mask_1, ¶m.span);
+ if (ret)
+ return ret;
strcpy(param.filename, RESULT_FILE_NAME1);
param.num_of_runs = 0;
param.cpu_no = sibling_cpu_no;
@@ -110,10 +110,12 @@ int cmt_resctrl_val(int cpu_no, int n, char **benchmark_cmd)
.mum_resctrlfs = false,
.filename = RESULT_FILE_NAME,
.mask = ~(long_mask << n) & long_mask,
- .span = cache_size * n / count_of_bits,
.num_of_runs = 0,
.setup = cmt_setup,
};
+ ret = cache_alloc_size(cpu_no, "L3", param.mask, ¶m.span);
+ if (ret)
+ return ret;
if (strcmp(benchmark_cmd[0], "fill_buf") == 0)
sprintf(benchmark_cmd[1], "%lu", param.span);
@@ -110,6 +110,8 @@ int mba_schemata_change(int cpu_no, char *bw_report, char **benchmark_cmd);
void mba_test_cleanup(void);
int get_cbm_mask(char *cache_type, unsigned long *mask);
int get_cache_size(int cpu_no, char *cache_type, unsigned long *cache_size);
+int cache_alloc_size(int cpu_no, char *cache_type, unsigned long slice_mask,
+ unsigned long *slice_size);
void ctrlc_handler(int signum, siginfo_t *info, void *ptr);
int cat_val(struct resctrl_val_param *param);
void cat_test_cleanup(void);
CAT and CMT tests calculate the span size from the n-bits cache allocation on their own. Add cache_alloc_size() helper which calculates size of the cache allocation for the given number of bits to avoid duplicating code. Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> --- tools/testing/selftests/resctrl/cache.c | 27 ++++++++++++++++++++++ tools/testing/selftests/resctrl/cat_test.c | 8 +++++-- tools/testing/selftests/resctrl/cmt_test.c | 4 +++- tools/testing/selftests/resctrl/resctrl.h | 2 ++ 4 files changed, 38 insertions(+), 3 deletions(-)