From patchwork Thu Oct 10 14:31:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adrian Hunter X-Patchwork-Id: 13830310 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 472B820DD2; Thu, 10 Oct 2024 14:33:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.18 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728570802; cv=none; b=s+eZ2mDozYdpti1Q5I8QmkvYzxAGEcJtSLcOk3xm6NuuSBw6pS8nbN/vhRooodloYE4xKLC+rjOVOT1j6RFRLCGOxGfFjzkO3SCPwahiyywt75RK8+XwiGTtwyQe132K8R69avgSUv48aCTpAK/Z2uC/rlWyovx/bulDIG0gddA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728570802; c=relaxed/simple; bh=QStAwdkye38HLwLvAfPzq8FmSRXF3FozST6s+/YdPUQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IHZXy4Wsmqs9j9yQJJKjDdNuyzHEkZzX1+Hrxm3SI8ZPTSTsjJtSkJ+XYBb7tn5IW5HbVlDKDZbu/SUqMuublHTzU37KNsUBE4hx6ZlQsas4ANWsQo4P/V7HhjYTsqPCUTuXCnQC866TdFBR4jbSrcimzAyTHOkaTmEyz8+vLug= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=khnBxWve; arc=none smtp.client-ip=198.175.65.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="khnBxWve" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728570801; x=1760106801; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QStAwdkye38HLwLvAfPzq8FmSRXF3FozST6s+/YdPUQ=; b=khnBxWvei23TMi9bC9TjuoRBH8KTOoC+JFo+PMuRXDeDpwACSfV5F2r0 RMKjXfUg+sWOu8P0nkFsvjRGg1p+SdhqdUUhB1evUKL7SKKUVrT+WyKzX lSDnx3Zw7dU7tK0QBSp8FbFmduOFnePyb/p6O8oMqSylckbeiD456ZEBT EckAWB4SYcmGm1HAtPpCv6eqg8bWiFXS1wvu3OtvACJsIowU49HWctF9w yUObNju8X9zJqUNEIZPqkkxT4gqpPgkg3Uq8DCN55xfxY1K2xudzYD5eP CDIrvRFImr0sgGRYhlVegPmNigl4o0IdMx3kMNhXW67Kmag2PjY7x5rV2 A==; X-CSE-ConnectionGUID: U0j2xBdVSw2oEqlRg73nOg== X-CSE-MsgGUID: AFBpL2bJSUeA81lN1Ms8OA== X-IronPort-AV: E=McAfee;i="6700,10204,11220"; a="28064242" X-IronPort-AV: E=Sophos;i="6.11,193,1725346800"; d="scan'208";a="28064242" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Oct 2024 07:33:21 -0700 X-CSE-ConnectionGUID: u4522CRMSmmoLU2oPRFgVQ== X-CSE-MsgGUID: oYroHnESQWGL3vPjvf6ByA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,193,1725346800"; d="scan'208";a="81189345" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO localhost.localdomain) ([10.246.16.81]) by fmviesa004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Oct 2024 07:33:11 -0700 From: Adrian Hunter To: Peter Zijlstra , Sean Christopherson , Paolo Bonzini Cc: Ingo Molnar , Mark Rutland , Alexander Shishkin , Heiko Carstens , Thomas Richter , Hendrik Brueckner , Suzuki K Poulose , Mike Leach , James Clark , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, Yicong Yang , Jonathan Cameron , Will Deacon , Arnaldo Carvalho de Melo , Jiri Olsa , Namhyung Kim , Ian Rogers , Andi Kleen , Thomas Gleixner , Borislav Petkov , Dave Hansen , x86@kernel.org, H Peter Anvin , Kan Liang , Zhenyu Wang , kvm@vger.kernel.org, Shuah Khan , linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: [PATCH V12 07/14] perf/x86/intel: Do not enable large PEBS for events with aux actions or aux sampling Date: Thu, 10 Oct 2024 17:31:44 +0300 Message-ID: <20241010143152.19071-8-adrian.hunter@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241010143152.19071-1-adrian.hunter@intel.com> References: <20241010143152.19071-1-adrian.hunter@intel.com> Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Events with aux actions or aux sampling expect the PMI to coincide with the event, which does not happen for large PEBS, so do not enable large PEBS in that case. Signed-off-by: Adrian Hunter Reviewed-by: Andi Kleen --- Changes in V11: Remove definition of has_aux_action() because it has already been added as an inline function. arch/x86/events/intel/core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 7ca40002a19b..bb284aff7bfd 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -3962,8 +3962,8 @@ static int intel_pmu_hw_config(struct perf_event *event) if (!(event->attr.freq || (event->attr.wakeup_events && !event->attr.watermark))) { event->hw.flags |= PERF_X86_EVENT_AUTO_RELOAD; - if (!(event->attr.sample_type & - ~intel_pmu_large_pebs_flags(event))) { + if (!(event->attr.sample_type & ~intel_pmu_large_pebs_flags(event)) && + !has_aux_action(event)) { event->hw.flags |= PERF_X86_EVENT_LARGE_PEBS; event->attach_state |= PERF_ATTACH_SCHED_CB; }