@@ -993,12 +993,18 @@ static bool pmu_irq_is_valid(struct kvm *kvm, int irq)
u8 kvm_arm_pmu_get_max_counters(struct kvm *kvm)
{
struct arm_pmu *arm_pmu = kvm->arch.arm_pmu;
+ u8 limit;
+
+ if (arm_pmu->partitioned)
+ limit = arm_pmu->hpmn - 1;
+ else
+ limit = ARMV8_PMU_MAX_GENERAL_COUNTERS;
/*
* The arm_pmu->cntr_mask considers the fixed counter(s) as well.
* Ignore those and return only the general-purpose counters.
*/
- return bitmap_weight(arm_pmu->cntr_mask, ARMV8_PMU_MAX_GENERAL_COUNTERS);
+ return bitmap_weight(arm_pmu->cntr_mask, limit);
}
static void kvm_arm_set_pmu(struct kvm *kvm, struct arm_pmu *arm_pmu)
@@ -610,7 +610,7 @@ static void run_pmregs_validity_test(uint64_t pmcr_n)
*/
static void run_error_test(uint64_t pmcr_n)
{
- pr_debug("Error test with pmcr_n %lu (larger than the host)\n", pmcr_n);
+ pr_debug("Error test with pmcr_n %lu (larger than the host allows)\n", pmcr_n);
test_create_vpmu_vm_with_pmcr_n(pmcr_n, true);
destroy_vpmu_vm();
The ARM architecture specifies that when MDCR_EL2.HPMN is set, EL1 and EL0, which includes KVM guests, should read that value for PMCR.N. Signed-off-by: Colton Lewis <coltonlewis@google.com> --- arch/arm64/kvm/pmu-emul.c | 8 +++++++- tools/testing/selftests/kvm/aarch64/vpmu_counter_access.c | 2 +- 2 files changed, 8 insertions(+), 2 deletions(-)