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Wed, 7 Aug 2024 12:00:22 -0700 From: Nicolin Chen To: , , CC: , , , , , Subject: [PATCH v3 4/4] iommu/arm-smmu-v3: Implement arm_smmu_get_msi_mapping_domain Date: Wed, 7 Aug 2024 12:00:07 -0700 Message-ID: <4fb65d188978955861cc3d3bf665ca83b8debb9b.1723056910.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CDF:EE_|MN0PR12MB6004:EE_ X-MS-Office365-Filtering-Correlation-Id: 7c785ad3-ef6c-4fad-b880-08dcb7133d32 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|82310400026|1800799024; X-Microsoft-Antispam-Message-Info: yY99LwYhM+h3HkSUSYD6ZieTwEYNg8FvcGTti3hB38kpX0B6/vKXfj2u4O6Bsz0nEL6RWGBldcXBLBQ1zE7cEpI05Qi04ELkJharDgQ6aN0E6dz6lMQQNaabgqGTCF2SdU6q7NEZSLedUNLO6o6g+q2b8SRbNDvaiU7+1UwujdO4viUZj4ygJX8W/aMC11CNp7wSgkWOKttfOmbzcUrlVOuDNLjxR2kNQY7WjTpcts4h7WAGaQ3Y2UuTJ6HMQQSi2KbmMjm4ZrjGP5GxoAoLy3keDD5PyEZF5vIMxDJwpHfvKGzfsqa0NP9HEYlyXEICo1RIbedcA8kUCHuWBa1j4ovANdpYdjUsaov16ZwpVbIiBak9Ob4Q+NsJeO2N0FhoECCmYjIBMflMxmP7aOq/GLKgbmH1kaFEpmjF+cx2i+09ydb5KjDOCLjNm9dXPkKflbwZgt7Li82hDMOHllSw1bsaycYtEZ/m9o0mTsUJ1iM18yV5sKgwAwAqFTw4MNdfhtX31mtFfHfIRUxEKgRTzLo5K1fUUmzbOEB3APfoSkwbG9SdmRrtd7XN6DMX98CxXp7h0CVM9AkHmyFl30YCQ3zpIuF15GloQoigL+pdpnkbXNFQS41zp9wjTz8qpkAmfxwcZp7+AUmyIpA7fXcOE+roqUdAHCwLLI5i83watAm6JaYVHonc/5awBlp82ok+RKc4BTBsZ7EUD0uBtT00avKLfyGB45Q6fhViMkhj1kxqclLNZU6DLXLwYd8qPwQiK9W0ytgQ0RLbHmd6TvBh4TYPXKzDHWD7wRB3dhri94U26GII5k884KXwCg7H7AdrZ77tVATGVfS80GtPJEBffJ6vdzBi83TdMztgWM/gkIp6U2vNNyPGkBtXiZ+eVQSaruM6CHmUxfcNi9vrFUi9oIAxhWtF4rPHaJwso1J70qmWj75FLQd8dFZniGoBAubOUmlE1tnJ/CSgVUERSARn0VYfY3owEgv/BFKWKwM17+UWmZXmDxukzKsvwFH/PyRaKAHHGUDa7DknS/3gHYLY2nbHXXwzYep7hMiCAOpJ30zwiY//wR24soYBADacWdNwjSEOcjVmeBRKGbD27NezXWXvWDoZq+sRuwMxWxd7LXezWs9YrGgpmyoXC2F5ukfw/BWS7MC2c1QDnxMG0L0nbXzPr2/yORJUD1FOEI21jxt8b4A16nj1BAUlQXPTqP4UmFv323+4q6x9CJXFLW233YHu8X98hslWOWBlP+/E5/Mcwzvp+o+XjOHpBmLlZlMWemATKkOGFnG54KCtrgAQh4k7WGYLu1xIYIJX67azXs9aKmkOkyjHc+hDtlnC7DH0pnhgXdm8L1Y1hAl8D0YIscnvdxc7+EHYREKNi1nE0inEmQNCUOPnqBHGdaO681xJdPtbJu63hNPvnKGSkOPIGXlRQIUlPeTQ44DkKKdA9BaGMMDRFJCEnE9P7LBXn5+y X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(376014)(82310400026)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Aug 2024 19:00:43.8451 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7c785ad3-ef6c-4fad-b880-08dcb7133d32 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CDF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6004 In a 1-stage translation setup, a device is attached to a paging domain. In a 2-stage translation setup, a device is attached to a nested domain, which does not have the mappings for the MSI page but only an s2_parent paging domain pointer that holds the mappings. Add arm_smmu_get_msi_mapping_domain in arm_smmu_nested_ops to return the correct paging domain. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 24836f3269b3..3962d5a55519 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3305,10 +3305,20 @@ static int arm_smmu_cache_invalidate_user(struct iommu_domain *domain, return ret; } +static struct iommu_domain * +arm_smmu_get_msi_mapping_domain(struct iommu_domain *domain) +{ + struct arm_smmu_nested_domain *nested_domain = + container_of(domain, struct arm_smmu_nested_domain, domain); + + return &nested_domain->s2_parent->domain; +} + static const struct iommu_domain_ops arm_smmu_nested_ops = { .attach_dev = arm_smmu_attach_dev_nested, .free = arm_smmu_domain_nested_free, .cache_invalidate_user = arm_smmu_cache_invalidate_user, + .get_msi_mapping_domain = arm_smmu_get_msi_mapping_domain, }; static struct iommu_domain *