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Tue, 27 Aug 2024 10:02:33 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , Subject: [PATCH v1 08/10] iommufd/selftest: Add IOMMU_TEST_OP_TRIGGER_VIRQ for VIRQ coverage Date: Tue, 27 Aug 2024 10:02:10 -0700 Message-ID: <6fd58376ee0b04d42cc62e233a65d26127f8f921.1724777091.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099D4:EE_|PH7PR12MB9075:EE_ X-MS-Office365-Filtering-Correlation-Id: ed12725b-0cd5-40c1-aaa8-08dcc6ba16b3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|7416014|36860700013; X-Microsoft-Antispam-Message-Info: BHXC0P6fGRKmW3mG++uDSnpNqpuBv/fYin+X7/7OkqBwnugtP8bbVNTETwEaH4ze2DdmP231hx/nPWwcrizBucfIsg40HIBi2l1BsoJmf4HTNdGXFDTxAQHVQmeSxocC7FSPslfo09T8C/9od3DtF0uNDoQ3v4kxxg3CfHxGQL9asRfxI9FCU/vj73+tIfI+uJ7OYYC7aJBDPo41466fo3ZRNuEvOe7azRCHvUhR7K7Eq1YbrqSUgUL1WXA4/Abev9CrcAL/V7iluRgUY1iwib00SS00KriKryBM/l1VzWTgzS3MhEG73u8FfBS306WM2Ex4GyuJ+0NVzl+mNStd8LIqiV7dBYo1jwk0C3TTuoS+o3IgpHVsm11cs9r9I2CpNn3qK4bSbThlOj1rzJODnNbkHjGxw6CDMlY9ShWnzWjluSnWvi/y0SReGJGiyEOZQ86lvFkzYZ3uJr4+uzy4bZW3478Z27NkMQXy1WeayOktix0ny5fSmb4bzpxrp1ZNDsTXj5R8Ertrwl48vEoGXkSBMGj2PD88reWYhv2RfVAwzrlrFK89m0COvdL3mliynW1afWKrXw/OKYbbD+PtKJ1HAxqK+/XuSXzlXDCfZqg1k1q38xOgxz+Yu8qRhuP8nNjPb49OZYMAwQCEUGs0VPPvDpb3z5k3EVBOZZM+6rykLdLrjvBSxXPsrxckq59+fCjXBvChjPZRJTjymAf006MyeKOWqi184145/dQZZzIaEz7NKQ6ZwUJEe7wXREGZ1WLMQp4FhDYTmh2stiIqvCjmJtPd1/ldlPxAZd4lGSwYijR1VFf1ZdmpBcfHYYQKnrNpAYMXGxW/PazD1uq6ZnWK8+xNSjPz71kPocWbTP4e+H+061JGb5lmH3X39Eyd/AI7sRKMQic4ZmJtOcdsONPg28U0zvhaaWUg8QsLBJU4ORwKCGov/mD7wCCsGhHtJY4TQDttLv6SMuV0zJ4Kuda0UPWn8JNs+eXpirCiumCJSt1OFDM9YEVnDxrhEZwl5u7e1aAJjKSjX6ckqb23/71KcvteDudlFQa3Vx7Icy2jWQv4c9cRKH5Eg4VJwcGMQWi7jqhJP8hoLgXk1WiSAx9ROB0QlyO3Yp3vr7lIgo4pOpBS5dO5HVp1wRh9FmHBWbABWKJnZywhFj4s8MTBVdpCLJH8en9OYlrdvhXybAwLAF9RHExZsgNS7QdqV9UH7jaALRvi5NhCFCKALAmuH4IZKxiqSKws7HcpvyMQBmEFGydXIlfiFGPEwZAYb9edDUZR9nwtKjchZokz10KdogvydWmYvXX4D8ufxJywlkCSh9CU2vKI8IS62tVfVmOASSrJ5SCwt3uDg+jC1/mrncujC9JYd1+tKfTl/Sd0M692lu4djhT1ZGNEqF1jU7unR1WA2ZbOuor5oUkbkYbOK1Xy0XLzuzVc8oPOMGLKnlVjobHK1L5yp4gWGG3u3qSF X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(376014)(7416014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Aug 2024 17:02:52.5451 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ed12725b-0cd5-40c1-aaa8-08dcc6ba16b3 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099D4.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB9075 The handler will get vdev_id structure from the given mdev and convert it to its per-viommu virtual device ID to mimic a real IOMMU driver. Signed-off-by: Nicolin Chen --- drivers/iommu/iommufd/iommufd_test.h | 10 ++++++++++ drivers/iommu/iommufd/selftest.c | 30 ++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/drivers/iommu/iommufd/iommufd_test.h b/drivers/iommu/iommufd/iommufd_test.h index 56bade6146ff..736ae5f8152e 100644 --- a/drivers/iommu/iommufd/iommufd_test.h +++ b/drivers/iommu/iommufd/iommufd_test.h @@ -24,6 +24,7 @@ enum { IOMMU_TEST_OP_MD_CHECK_IOTLB, IOMMU_TEST_OP_TRIGGER_IOPF, IOMMU_TEST_OP_DEV_CHECK_CACHE, + IOMMU_TEST_OP_TRIGGER_VIRQ, }; enum { @@ -145,6 +146,9 @@ struct iommu_test_cmd { __u32 id; __u32 cache; } check_dev_cache; + struct { + __u32 dev_id; + } trigger_virq; }; __u32 last; }; @@ -210,4 +214,10 @@ struct iommu_viommu_invalidate_selftest { __u32 cache_id; }; +#define IOMMU_VIRQ_TYPE_SELFTEST 0xbeefbeef + +struct iommu_viommu_irq_selftest { + __u32 vdev_id; +}; + #endif diff --git a/drivers/iommu/iommufd/selftest.c b/drivers/iommu/iommufd/selftest.c index ea2861d34b4a..75fccd466018 100644 --- a/drivers/iommu/iommufd/selftest.c +++ b/drivers/iommu/iommufd/selftest.c @@ -1560,6 +1560,34 @@ static int iommufd_test_trigger_iopf(struct iommufd_ucmd *ucmd, return 0; } +static int iommufd_test_trigger_virq(struct iommufd_ucmd *ucmd, + struct iommu_test_cmd *cmd) +{ + struct iommufd_device *idev; + struct mock_dev *mdev; + + idev = iommufd_get_device(ucmd, cmd->trigger_virq.dev_id); + if (IS_ERR(idev)) + return PTR_ERR(idev); + mdev = container_of(idev->dev, struct mock_dev, dev); + + mutex_lock(&mdev->lock); + if (mdev->vdev_id) { + struct iommu_viommu_irq_selftest test = { + .vdev_id = mdev->vdev_id->id, + }; + + iommufd_viommu_report_irq(mdev->vdev_id->viommu, + IOMMU_VIRQ_TYPE_SELFTEST, + &test, sizeof(test)); + } + mutex_unlock(&mdev->lock); + + iommufd_put_object(ucmd->ictx, &idev->obj); + + return 0; +} + void iommufd_selftest_destroy(struct iommufd_object *obj) { struct selftest_obj *sobj = container_of(obj, struct selftest_obj, obj); @@ -1641,6 +1669,8 @@ int iommufd_test(struct iommufd_ucmd *ucmd) cmd->dirty.flags); case IOMMU_TEST_OP_TRIGGER_IOPF: return iommufd_test_trigger_iopf(ucmd, cmd); + case IOMMU_TEST_OP_TRIGGER_VIRQ: + return iommufd_test_trigger_virq(ucmd, cmd); default: return -EOPNOTSUPP; }