From patchwork Tue Oct 5 13:12:51 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 232651 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o95DCoDX019805 for ; Tue, 5 Oct 2010 13:12:50 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752535Ab0JENMt (ORCPT ); Tue, 5 Oct 2010 09:12:49 -0400 Received: from perceval.irobotique.be ([92.243.18.41]:55203 "EHLO perceval.irobotique.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752455Ab0JENMs (ORCPT ); Tue, 5 Oct 2010 09:12:48 -0400 Received: from localhost.localdomain (unknown [91.178.118.113]) by perceval.irobotique.be (Postfix) with ESMTPSA id 8764B35DA5; Tue, 5 Oct 2010 13:12:45 +0000 (UTC) From: Laurent Pinchart To: linux-media@vger.kernel.org Cc: sakari.ailus@maxwell.research.nokia.com Subject: [RFC/PATCH v2 05/10] v4l: Add remaining RAW10 patterns w DPCM pixel code variants Date: Tue, 5 Oct 2010 15:12:51 +0200 Message-Id: <1286284376-12217-6-git-send-email-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 1.7.2.2 In-Reply-To: <1286284376-12217-1-git-send-email-laurent.pinchart@ideasonboard.com> References: <1286284376-12217-1-git-send-email-laurent.pinchart@ideasonboard.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Tue, 05 Oct 2010 13:12:50 +0000 (UTC) diff --git a/include/linux/v4l2-mediabus.h b/include/linux/v4l2-mediabus.h index 897c13a..9c972ec 100644 --- a/include/linux/v4l2-mediabus.h +++ b/include/linux/v4l2-mediabus.h @@ -59,7 +59,7 @@ enum v4l2_mbus_pixelcode { V4L2_MBUS_FMT_YVYU8_2X8 = 0x2009, V4L2_MBUS_FMT_Y10_1X10 = 0x200a, - /* Bayer - next is 0x300b */ + /* Bayer - next is 0x3010 */ V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001, V4L2_MBUS_FMT_SGRBG8_1X8 = 0x3002, V4L2_MBUS_FMT_SBGGR10_1X10 = 0x3003, @@ -67,8 +67,13 @@ enum v4l2_mbus_pixelcode { V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE = 0x3005, V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_BE = 0x3006, V4L2_MBUS_FMT_SBGGR10_2X8_PADLO_LE = 0x3007, + V4L2_MBUS_FMT_SBGGR10_DPCM8_1X8 = 0x300b, + V4L2_MBUS_FMT_SGBRG10_1X10 = 0x300c, + V4L2_MBUS_FMT_SGBRG10_DPCM8_1X8 = 0x300d, V4L2_MBUS_FMT_SGRBG10_1X10 = 0x3009, V4L2_MBUS_FMT_SGRBG10_DPCM8_1X8 = 0x300a, + V4L2_MBUS_FMT_SRGGB10_1X10 = 0x300e, + V4L2_MBUS_FMT_SRGGB10_DPCM8_1X8 = 0x300f, V4L2_MBUS_FMT_SBGGR12_1X12 = 0x3008, };