@@ -54,6 +54,7 @@ enum s3c24xx_i2c_state {
enum s3c24xx_i2c_type {
TYPE_S3C2410,
TYPE_S3C2440,
+ TYPE_S3C2440_HDMIPHY,
};
struct s3c24xx_i2c {
@@ -96,7 +97,21 @@ static inline int s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c)
enum s3c24xx_i2c_type type;
type = platform_get_device_id(pdev)->driver_data;
- return type == TYPE_S3C2440;
+ return type == TYPE_S3C2440 || type == TYPE_S3C2440_HDMIPHY;
+}
+
+/* s3c24xx_i2c_is2440_hdmiphy()
+ *
+ * return true is this is an s3c2440 dedicated for HDMIPHY interface
+*/
+
+static inline int s3c24xx_i2c_is2440_hdmiphy(struct s3c24xx_i2c *i2c)
+{
+ struct platform_device *pdev = to_platform_device(i2c->dev);
+ enum s3c24xx_i2c_type type;
+
+ type = platform_get_device_id(pdev)->driver_data;
+ return type == TYPE_S3C2440_HDMIPHY;
}
/* s3c24xx_i2c_master_complete
@@ -461,6 +476,13 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
unsigned long iicstat;
int timeout = 400;
+ /* if hang-up of HDMIPHY occured reduce timeout
+ * The controller will work after reset, so waiting
+ * 400 ms will cause unneccessary system hangup
+ */
+ if (s3c24xx_i2c_is2440_hdmiphy(i2c))
+ timeout = 10;
+
while (timeout-- > 0) {
iicstat = readl(i2c->regs + S3C2410_IICSTAT);
@@ -470,6 +492,15 @@ static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c)
msleep(1);
}
+ /* hang-up of bus dedicated for HDMIPHY occured, resetting */
+ if (s3c24xx_i2c_is2440_hdmiphy(i2c)) {
+ writel(0, i2c->regs + S3C2410_IICCON);
+ writel(0, i2c->regs + S3C2410_IICSTAT);
+ writel(0, i2c->regs + S3C2410_IICDS);
+
+ return 0;
+ }
+
return -ETIMEDOUT;
}
@@ -1009,6 +1040,9 @@ static struct platform_device_id s3c24xx_driver_ids[] = {
}, {
.name = "s3c2440-i2c",
.driver_data = TYPE_S3C2440,
+ }, {
+ .name = "s3c2440-hdmiphy-i2c",
+ .driver_data = TYPE_S3C2440_HDMIPHY,
}, { },
};
MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids);